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214 Open 754 Closed
214 Open 754 Closed
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Issues list

ch6-sepmp -- Whether should we add a sfence.vma after configuring the epmp extension by setting the mseccfg.mmwp/mml bits?
#1859 opened Feb 14, 2025 by rock-ifly
1
Integrate E-Trace Encapsulation Integration Pending Integration
#1858 opened Feb 13, 2025 by rpsene
3
Integrate Capacity and Bandwidth Controller QoS Register Interface Pending Integration
#1857 opened Feb 13, 2025 by rpsene
1
Integrate AIA Pending Integration
#1856 opened Feb 13, 2025 by rpsene
Is there any possibility come lr-lr-sc scnerio from OS for one RV Hart?
#1854 opened Feb 13, 2025 by omerkarslioglu
3
Unclear sentence in "C" extension
#1849 opened Feb 10, 2025 by pfusik
Is hardware updating of A/D bits enabled when Svadu is not implemented
#1846 opened Feb 10, 2025 by trdthg
1
Change "implementor" to "implementers"; fix a couple typos
#1830 opened Jan 28, 2025 by kbroch-rivosinc
@kbroch-rivosinc
3
Changes to support building Priv and Unpriv manuals as adoc "parts" in a larger adoc "book"
#1826 opened Jan 26, 2025 by james-ball-qualcomm
@wmat @james-ball-qualcomm
4
Smepmp extension chapter needs a rewrite to make it normative
#1818 opened Jan 21, 2025 by radimkrcmar
4
What does "inlined" mean?
#1814 opened Jan 17, 2025 by kersten1
18
Replace long form id syntax with short form on antora-refactor branch
#1813 opened Jan 17, 2025 by wmat
@wmat
Use unified spec describe CSR registers
#1809 opened Jan 16, 2025 by trdthg
3
Questions about constraints on misa.V and xstatus.VS
#1802 opened Jan 15, 2025 by Vivvvvvvv
3
the mode to take LCOFI once it's delegated
#1800 opened Jan 13, 2025 by Steven-Li-Xiaogang
3
way to clear VSTIP and VSEIP injected by hvip.VSTIP and hvip.VSEIP from VS-mode
#1798 opened Jan 12, 2025 by Steven-Li-Xiaogang
Notation for branch/jump target ranges might be misleading
#1781 opened Dec 19, 2024 by WorldofJARcraft
Integrate Load/Store Pair for RV32
#1766 opened Dec 11, 2024 by christian-herber-nxp
1
HUPMM introduced by Ssnpm not updated in layout of hstatus
#1763 opened Dec 10, 2024 by viktoryou
mcause/scause values when H is implemented
#1762 opened Dec 10, 2024 by pdonahue-ventana
Should it raise an exception when VA exceed the max range of the VA when mmu off? what kind of the that exception?
#1754 opened Dec 6, 2024 by rock-ifly
3
How to understand the "convert an invalid address into some other invalid address" in 3.1.14 MEPC register description
#1753 opened Dec 3, 2024 by rock-ifly
3
instret, cycle, time outside of Zicntr (and hpmpcounterN outside Zihpm)
#1734 opened Nov 22, 2024 by dhower-qc
10
Specify what imprecise traps are
#1728 opened Nov 15, 2024 by Timmmm
11
Conflicting exception types caused by misaligned AMO instructions.
#1726 opened Nov 15, 2024 by jillleon007
8
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