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Update src/m-st-ext.adoc
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Signed-off-by: Kersten Richter <[email protected]>
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kersten1 authored Jan 30, 2025
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Expand Up @@ -28,7 +28,7 @@ register. MULH, MULHU, and MULHSU perform the same multiplication but
return the upper XLEN bits of the full 2×XLEN-bit
product, for signed×signed,
unsigned×unsigned, and `rs1`×unsigned `rs2` multiplication.
If both the high and low bits of the same product are required, then the recommended code sequence is: `MULH[[S]U]` `rdh`, `rs1`, `rs2`; `MUL rdl`, `rs1`, `rs2` (source register specifiers must be in same order and `rdh` cannot be the same as `rs1` or `rs2`). Microarchitectures can then fuse these into a single multiply operation instead of performing two separate multiplies.
If both the high and low bits of the same product are required, then the recommended code sequence is: `MULH[[S]U] rdh, rs1, rs2; MUL rdl, rs1, rs2` (source register specifiers must be in same order and `rdh` cannot be the same as `rs1` or `rs2`). Microarchitectures can then fuse these into a single multiply operation instead of performing two separate multiplies.

[NOTE]
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