[CodeGen][NPM] VirtRegRewriter: Set VirtReg flag

[vikramRH]

same as #138660,

Co-authored-by : Oke, Akshat <[email protected]>

[vikramRH]

• [AMDGPU][NPM] Add isRequired to passes missing it #148115
• [CodeGen][NPM] Stitch up loop passes in codegen pipeline #148114
• [CodeGen][NPM] Clear MachineFunctions without using PA #148113
• [AMDGPU][NPM] Fill in addPreSched2 passes #148112
• [CodeGen][NPM] Account inserted passes for -start/stop options #148111
• [CodeGen][NPM] Port ProcessImplicitDefs to NPM #148110
• [CodeGen][NPM] Register Function Passes #148109
• [CodeGen][NPM] Read TargetMachine's EnableIPRA option #148108
• [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag #148107 👈 (View in Graphite)
• [AMDGPU][NPM] Register AMDGPUWaitSGPRHazards pass #148106
• main

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[llvmbot]

@llvm/pr-subscribers-llvm-regalloc

Author: Vikram Hegde (vikramRH)

Changes

same as #138660,

Authored by @optimisan

---

Full diff: https://github.com/llvm/llvm-project/pull/148107.diff

2 Files Affected:

• (modified) llvm/include/llvm/CodeGen/VirtRegMap.h (+8)
• (modified) llvm/lib/CodeGen/VirtRegMap.cpp (+2)

diff --git a/llvm/include/llvm/CodeGen/VirtRegMap.h b/llvm/include/llvm/CodeGen/VirtRegMap.h
index 5ab3f7e742230..b5f962e0fb821 100644
--- a/llvm/include/llvm/CodeGen/VirtRegMap.h
+++ b/llvm/include/llvm/CodeGen/VirtRegMap.h
@@ -251,6 +251,14 @@ class VirtRegRewriterPass : public PassInfoMixin<VirtRegRewriterPass> {
 
   LLVM_ABI void printPipeline(raw_ostream &OS,
                               function_ref<StringRef(StringRef)>) const;
+
+  MachineFunctionProperties getSetProperties() const {
+    if (ClearVirtRegs) {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::NoVRegs);
+    }
+    return {};
+  }
 };
 
 } // end llvm namespace
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index 3d6ccba894e9c..99ba893d6f096 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -301,6 +301,8 @@ bool VirtRegRewriterLegacy::runOnMachineFunction(MachineFunction &MF) {
 PreservedAnalyses
 VirtRegRewriterPass::run(MachineFunction &MF,
                          MachineFunctionAnalysisManager &MFAM) {
+  MFPropsModifier _(*this, MF);
+
   VirtRegMap &VRM = MFAM.getResult<VirtRegMapAnalysis>(MF);
   LiveIntervals &LIS = MFAM.getResult<LiveIntervalsAnalysis>(MF);
   LiveRegMatrix &LRM = MFAM.getResult<LiveRegMatrixAnalysis>(MF);