SystemVerilog: fix identifier on enum type

src/verilog/parser.y

@@ -1467,8 +1467,8 @@ data_type:
 
 	          // We attach a dummy id to distinguish two syntactically
 	          // identical enum types.
-	          auto id = PARSER.current_scope->prefix + "enum-" + PARSER.get_next_id();
-	          stack_expr($$).set(ID_identifier, id);
+	          auto base_name = "enum-" + PARSER.get_next_id();
+	          stack_expr($$).set(ID_base_name, base_name);
 	        }
 	| TOK_STRING
 	        { init($$, ID_string); }

src/verilog/verilog_elaborate.cpp

@@ -173,8 +173,12 @@ void verilog_typecheckt::collect_symbols(const typet &type)
     // Add a symbol for the enum to the symbol table.
     // This allows looking up the enum name identifiers.
     {
-      auto identifier = enum_type.identifier();
-      type_symbolt enum_type_symbol(identifier, enum_type, mode);
+      const auto base_name = enum_type.base_name();
+      const auto identifier = hierarchical_identifier(base_name);
+      auto enum_type_with_identifier = enum_type;
+      enum_type_with_identifier.identifier(identifier);
+      type_symbolt enum_type_symbol(
+        identifier, enum_type_with_identifier, mode);
       enum_type_symbol.module = module_identifier;
       enum_type_symbol.is_file_local = true;
       enum_type_symbol.location = enum_type.source_location();

src/verilog/verilog_types.h

@@ -408,12 +408,23 @@ class verilog_enum_typet : public type_with_subtypet
     return (enum_namest &)(add(ID_enum_names).get_sub());
   }
 
-  // The identifier is generated by the parser, using a counter.
+  // The base name is generated by the parser, using a counter.
+  irep_idt base_name() const
+  {
+    return get(ID_base_name);
+  }
+
+  // Generated by the type checker.
   irep_idt identifier() const
   {
     return get(ID_identifier);
   }
 
+  void identifier(irep_idt __identifier)
+  {
+    return set(ID_identifier, __identifier);
+  }
+
 protected:
   // use base_type instead
   using type_with_subtypet::subtype;