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Pull requests: diffblue/hw-cbmc

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Pull requests list

Verilog: fix integral vs. bit vector terminology cleanup Verilog
#1449 opened Dec 1, 2025 by kroening Loading…
SystemVerilog: sequence and property ports Verilog
#1436 opened Nov 24, 2025 by kroening • Draft
transition system language API
#1418 opened Nov 18, 2025 by kroening • Draft
Make the counter synthesizable, update comment
#1414 opened Nov 15, 2025 by ShashankVM • Draft
1
SystemVerilog: type parameter ports Verilog
#1412 opened Nov 13, 2025 by kroening • Draft
SMV: pre-traversal identifier conversion SMV
#1409 opened Nov 12, 2025 by kroening • Draft
SMV output: use IVAR
#1396 opened Nov 9, 2025 by kroening • Draft
SMV: use NuSMV's operator precedence SMV
#1382 opened Nov 2, 2025 by kroening • Draft
netlist conversion: replace recursion by explicit stack engines
#1373 opened Oct 29, 2025 by kroening • Draft
bump CBMC dependency to release 6.8.0 dependencies Pull requests that update a dependency file
#1364 opened Oct 26, 2025 by kroening • Draft
SMV: enums are global SMV
#1358 opened Oct 23, 2025 by kroening Loading…
Verilog: fix semantics of cover disable iff Verilog
#1346 opened Oct 20, 2025 by kroening • Draft
Generate VCD file for each cover statement
#1296 opened Oct 3, 2025 by ShashankVM Loading…
1
10
SystemVerilog .* wildcard port connections Verilog
#1240 opened Aug 26, 2025 by kroening • Draft
SMV: union operator SMV
#1186 opened Jul 7, 2025 by kroening • Draft
split up ltl_sva_to_stringt::rec cleanup engines
#1171 opened Jun 27, 2025 by kroening • Draft
SVA: strengthen typing of sva_sequence_concatenation_exprt cleanup
#1161 opened Jun 17, 2025 by kroening • Draft
1
NeurIPS 2025 SystemVerilog benchmarks
#1147 opened Jun 6, 2025 by kroening Loading…
SMV: bit selection operator SMV
#1113 opened May 18, 2025 by kroening • Draft
SMV: expression typechecker now post-traversal SMV
#1040 opened Mar 28, 2025 by kroening Loading…
2
SVA monitor engines Verilog
#1011 opened Feb 25, 2025 by kroening • Draft
SystemVerilog: interface instantiation Verilog
#972 opened Feb 6, 2025 by kroening • Draft
SystemVerilog: declarations in named blocks in tasks/functions Verilog
#970 opened Feb 6, 2025 by kroening • Draft
1
SystemVerilog: preserve scopes between compilation units Verilog
#963 opened Feb 4, 2025 by kroening • Draft
SystemVerilog: create identifier expressions in scanner Verilog
#953 opened Jan 29, 2025 by kroening • Draft
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