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Verilog: test for hierarchical identifier inside an assertion #2780

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Verilog: test for hierarchical identifier inside an assertion

Verilog: test for hierarchical identifier inside an assertion #2780

Triggered via pull request July 12, 2025 22:17
@kroeningkroening
synchronize #1197
hierarchical_identifiers3
Status Success
Total duration 1m 35s
Artifacts –

syntax-checks.yaml

on: pull_request
check-clang-format
1m 32s
check-clang-format
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