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This is my trial implementation of PDP-11 processor in System Verilog

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PDP-11

This is my trial implementation of PDP-11 processor in System Verilog. I wanted to build a 16 bit Processor and PDP-11 is the only processor that is not written in System Verilog. This implementation might not be bug free as it is written by 2 college students but currently our plan is to write a code which can simulate the CPU primarily. The IO and hard disk support might be planned later on.

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I am using the books which are available online.

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This is my trial implementation of PDP-11 processor in System Verilog

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