improve build script

Signed-off-by: Manuel Rodríguez <[email protected]>
zero-day-labs · Jun 21, 2024 · a617381 · a617381
1 parent 4ac5554
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diff --git a/README.md b/README.md
@@ -74,7 +74,7 @@ Then, to compile all sources, run in the top directory of the repository:
 ```
 ./build_all
 ```
-The output files (fw_payload.bin and fw_payload.elf) will be in the `opensbi/build/platform/fpga/ariane/firmware/` directory.
+All output files will be in the `output` directory.
 
 ### Copying to the SD Card
 To copy the binary file to the SD card:
@@ -91,7 +91,7 @@ sudo sgdisk --clear --new=1:2048:7000 --new=2 --typecode=1:3000 --typecode=2:830
 
 3. Copy the binary file to the SD card. Again, replace *\<dev_file\>* with the dev file you identfied in step 1. 
 ```
-sudo dd if=opensbi/build/platform/fpga/ariane/firmware/fw_payload.bin of=<dev_file> oflag=sync bs=1M
+sudo dd if=output/fw_payload.bin of=<dev_file> oflag=sync bs=1M
 ```
 
 ### Configuring the Genesys2 board

diff --git a/build_all.sh b/build_all.sh
@@ -1,10 +1,44 @@
 #!/bin/bash
 
-make -C bao-baremetal-guest clean
-make -C bao-baremetal-guest CROSS_COMPILE=riscv64-unknown-elf- PLATFORM=cva6
+ROOT="/home/manuale97/my_repositories/demo_rvsummit_23"
 
-make -C bao-hypervisor clean
-make -C bao-hypervisor CROSS_COMPILE=riscv64-unknown-elf- PLATFORM=cva6 CONFIG=cva6-baremetal CONFIG_BUILTIN=y
+BAREMETAL_DIR="${ROOT}/bao-baremetal-guest"
+BAO_DIR="${ROOT}/bao-hypervisor"
+CONFIG_DIR="${ROOT}/configs"
+OPENSBI_DIR="${ROOT}/opensbi"
 
-make -C opensbi clean
-make -C opensbi CROSS_COMPILE=riscv64-unknown-linux-gnu- PLATFORM=fpga/ariane FW_PAYLOAD=y FW_PAYLOAD_PATH=/home/manuale97/my_repositories/demo_rvsummit_23/bao-hypervisor/bin/cva6/cva6-baremetal/bao.bin
+OUTPUT_DIR="${ROOT}/output"
+
+if [ ! -e ${OUTPUT_DIR} ]; then
+    mkdir ${OUTPUT_DIR}
+fi
+
+rm -f -r ${OUTPUT_DIR}/*
+
+make -C ${BAREMETAL_DIR} clean
+make -C ${BAREMETAL_DIR} CROSS_COMPILE=riscv64-unknown-elf- PLATFORM=cva6
+
+if [ ! -e ${BAREMETAL_DIR}/build/cva6/baremetal.bin ]; then
+    echo "$0: ${BAREMETAL_DIR}/build/cva6/baremetal.bin not found"
+    exit 1
+else
+    cp ${BAREMETAL_DIR}/build/cva6/baremetal.bin ${OUTPUT_DIR}
+fi
+
+make -C ${BAO_DIR} clean
+make -C ${BAO_DIR} CROSS_COMPILE=riscv64-unknown-elf- PLATFORM=cva6 CONFIG_REPO=${CONFIG_DIR} CONFIG=cva6-baremetal CONFIG_BUILTIN=y
+if [ ! -e ${BAO_DIR}/bin/cva6/cva6-baremetal/bao.bin ]; then
+    echo "$0: ${BAO_DIR}/bin/cva6/cva6-baremetal/bao.bin not found"
+    exit 1
+else
+    cp ${BAO_DIR}/bin/cva6/cva6-baremetal/bao.bin ${OUTPUT_DIR}
+fi
+
+make -C ${OPENSBI_DIR} clean
+make -C ${OPENSBI_DIR} CROSS_COMPILE=riscv64-unknown-linux-gnu- PLATFORM=fpga/ariane FW_PAYLOAD=y FW_PAYLOAD_PATH=${OUTPUT_DIR}/bao.bin
+if [ ! -e ${OPENSBI_DIR}/build/platform/fpga/ariane/firmware/fw_payload.elf ]; then
+    echo "$0: ${OPENSBI_DIR}/build/platform/fpga/ariane/firmware/fw_payload.elf not found"
+    exit 1
+else
+    cp ${OPENSBI_DIR}/build/platform/fpga/ariane/firmware/fw_payload.elf ${OPENSBI_DIR}/build/platform/fpga/ariane/firmware/fw_payload.bin ${OUTPUT_DIR}
+fi
diff --git a/configs/cva6-baremetal/config.c b/configs/cva6-baremetal/config.c
@@ -0,0 +1,93 @@
+#include <config.h>
+
+VM_IMAGE(baremetal_image, XSTR(/home/manuale97/my_repositories/demo_rvsummit_23/output/baremetal.bin));
+
+struct config config = {
+
+    CONFIG_HEADER
+
+    .vmlist_size = 1,
+    .vmlist = {
+        {
+            .image = {
+                .base_addr = 0x90000000,
+                .load_addr = VM_IMAGE_OFFSET(baremetal_image),
+                .size = VM_IMAGE_SIZE(baremetal_image)
+            },
+
+            .entry = 0x90000000,
+
+            .platform = {
+                .cpu_num = 1,
+
+                .region_num = 1,
+                .regions =  (struct vm_mem_region[]) {
+                    {
+                        .base = 0x90000000,
+                        .size = 0x20000000,
+                        .place_phys = true,
+                        .phys = 0x90000000,
+                    }
+                },
+
+                .dev_num = 7,
+                .devs =  (struct vm_dev_region[]) {
+                    {   // UART
+                        .pa = 0x10000000,   
+                        .va = 0x10000000,  
+                        .size = 0x00010000,
+                        .interrupt_num = 1,
+                        .interrupts = (irqid_t[]) {1}
+                    },
+                    {   // Timer
+                        .pa = 0x18000000,   
+                        .va = 0x18000000,  
+                        .size = 0x00001000,  
+                        .interrupt_num = 4,
+                        .interrupts = (irqid_t[]) {4,5,6,7}
+                    },
+                    {   // SPI
+                        .pa = 0x20000000,   
+                        .va = 0x20000000,  
+                        .size = 0x00001000,  
+                        .interrupt_num = 1,
+                        .interrupts = (irqid_t[]) {2}
+                    },
+                    {   // Ethernet
+                        .pa = 0x30000000,   
+                        .va = 0x30000000,  
+                        .size = 0x00008000,  
+                        .interrupt_num = 1,
+                        .interrupts = (irqid_t[]) {3}
+                    },
+                    {   // GPIO
+                        .pa = 0x40000000,   
+                        .va = 0x40000000,  
+                        .size = 0x00010000,  
+                        .interrupt_num = 0,
+                        .interrupts = (irqid_t[]) {}
+                    },
+                    {   // iDMA[0]
+                        .pa = 0x50000000,
+                        .va = 0x50000000,
+                        .size = 0x00001000,
+                        .interrupt_num = 0,
+                        .interrupts = (irqid_t[]) {},   // 8, 9
+                        .id = 1
+                    },
+                    {   // IOMMU (test only)
+                        .pa = 0x50010000,   
+                        .va = 0x50010000,  
+                        .size = 0x00001000,  
+                        .interrupt_num = 0,
+                        .interrupts = (irqid_t[]) {}
+                    },
+                },
+
+                .arch = {
+                   .plic_base = 0xc000000
+                }
+            }
+        }
+    }
+};