Skip to content

Prevent disabling OTG HS and USBPHY clocks during sleep on STM32U5 series #93268

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Jul 22, 2025
Merged

Prevent disabling OTG HS and USBPHY clocks during sleep on STM32U5 series #93268

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
b2b2e19
drivers: usb: device: prevent USB clock disable in sleep mode
marwaiehm-st Jul 17, 2025
8975a04
drivers: usb: udc: prevent USB clock disable in sleep mode
marwaiehm-st Jul 17, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 0 additions & 3 deletions drivers/usb/device/usb_dc_stm32.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -429,9 +429,6 @@ static int usb_dc_stm32_clock_enable(void)
LL_AHB1_GRP1_DisableClockSleep(LL_AHB1_GRP1_PERIPH_USB1OTGHSULPI);
#elif defined(CONFIG_SOC_SERIES_STM32U5X)
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_USBPHY);
/* Both OTG HS and USBPHY sleep clock MUST be disabled here at the same time */
LL_AHB2_GRP1_DisableClockStopSleep(LL_AHB2_GRP1_PERIPH_OTG_HS |
LL_AHB2_GRP1_PERIPH_USBPHY);
#elif DT_HAS_COMPAT_STATUS_OKAY(st_stm32n6_otghs)
/* Reset specific configuration bits before setting new values */
USB1_HS_PHYC->USBPHYC_CR &= ~USB_USBPHYC_CR_FSEL_Msk;
Expand Down
3 changes: 0 additions & 3 deletions drivers/usb/udc/udc_stm32.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1143,9 +1143,6 @@ static int priv_clock_enable(void)
LL_AHB1_GRP1_DisableClockSleep(LL_AHB1_GRP1_PERIPH_USB1OTGHSULPI);
#elif defined(CONFIG_SOC_SERIES_STM32U5X)
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_USBPHY);
/* Both OTG HS and USBPHY sleep clock MUST be disabled here at the same time */
LL_AHB2_GRP1_DisableClockStopSleep(LL_AHB2_GRP1_PERIPH_OTG_HS |
LL_AHB2_GRP1_PERIPH_USBPHY);
#elif DT_HAS_COMPAT_STATUS_OKAY(st_stm32n6_otghs)
/* Reset specific configuration bits before setting new values */
USB1_HS_PHYC->USBPHYC_CR &= ~USB_USBPHYC_CR_FSEL_Msk;
Expand Down
Loading