zephyrproject-rtos · EmilioCBen · Jun 27, 2025 · Jun 27, 2025 · Jun 27, 2025 · Jun 27, 2025
diff --git a/boards/nxp/frdm_mcxw71/frdm_mcxw71-pinctrl.dtsi b/boards/nxp/frdm_mcxw71/frdm_mcxw71-pinctrl.dtsi
@@ -80,4 +80,13 @@
 			slew-rate = "fast";
 		};
 	};
+
+	pinmux_flexio_pwm: pinmux_flexio_pwm {
+		group0 {
+			pinmux = <FLEXIO0_D20_PTC4>;
+			drive-strength = "low";
+			slew-rate = "fast";
+		};
+	};
+
 };
diff --git a/boards/nxp/frdm_mcxw71/frdm_mcxw71.yaml b/boards/nxp/frdm_mcxw71/frdm_mcxw71.yaml
@@ -12,6 +12,7 @@ supported:
   - can
   - counter
   - flash
+  - flexio
   - gpio
   - i2c
   - pinctrl

diff --git a/boards/nxp/frdm_mcxw72/frdm_mcxw72-pinctrl.dtsi b/boards/nxp/frdm_mcxw72/frdm_mcxw72-pinctrl.dtsi
@@ -77,4 +77,12 @@
 			drive-open-drain;
 		};
 	};
+
+	pinmux_flexio_pwm: pinmux_flexio_pwm {
+		group0 {
+			pinmux = <FLEXIO0_D20_PTC4>;
+			drive-strength = "low";
+			slew-rate = "fast";
+		};
+	};
 };
diff --git a/boards/nxp/frdm_mcxw72/frdm_mcxw72_mcxw727c_cpu0.yaml b/boards/nxp/frdm_mcxw72/frdm_mcxw72_mcxw727c_cpu0.yaml
@@ -12,6 +12,7 @@ supported:
   - can
   - counter
   - gpio
+  - flexio
   - i2c
   - pinctrl
   - pwm

diff --git a/drivers/clock_control/clock_control_mcux_scg_k4.c b/drivers/clock_control/clock_control_mcux_scg_k4.c
@@ -64,6 +64,9 @@ static int mcux_scg_k4_get_rate(const struct device *dev, clock_control_subsys_t
 	case SCG_K4_RTCOSC_CLK:
 		clock_name = kCLOCK_RtcOscClk;
 		break;
+	case SCG_K4_FLEXIO_CLK:
+		*rate = CLOCK_GetIpFreq(kCLOCK_Flexio0);
+		return 0;
 	default:
 		LOG_ERR("Unsupported clock name");
 		return -EINVAL;

diff --git a/drivers/pwm/pwm_nxp_flexio.c b/drivers/pwm/pwm_nxp_flexio.c
@@ -101,6 +101,8 @@ static int pwm_nxp_flexio_set_cycles(const struct device *dev,
 	FLEXIO_Type *flexio_base = (FLEXIO_Type *)(config->flexio_base);
 	struct nxp_flexio_child *child = (struct nxp_flexio_child *)(config->child);
 	enum pwm_nxp_flexio_polarity polarity;
+	uint32_t duty_cycle = period_cycles - pulse_cycles;
+	bool is_only_low_or_high = false;
 
 	/* Check received parameters for sanity */
 	if (channel >= config->pulse_info->pwm_pulse_channels) {
@@ -130,18 +132,27 @@ static int pwm_nxp_flexio_set_cycles(const struct device *dev,
 
 	pwm_info = &config->pulse_info->pwm_info[channel];
 
-	if ((flags & PWM_POLARITY_INVERTED) == 0) {
-		polarity = FLEXIO_PWM_ACTIVE_HIGH;
-	} else {
+	polarity = (flags & PWM_POLARITY_INVERTED) == 0 ?
+		FLEXIO_PWM_ACTIVE_HIGH : FLEXIO_PWM_ACTIVE_LOW;
+
+	/*
+	 * Checking to see if duty cycle is 0% or 100%
+	 * If so manually keep the GPIO HIGH or LOW.
+	 */
+	if (period_cycles == pulse_cycles) {
 		polarity = FLEXIO_PWM_ACTIVE_LOW;
+		is_only_low_or_high = true;
+	} else if (duty_cycle == period_cycles && !pulse_cycles) {
+		polarity = FLEXIO_PWM_ACTIVE_HIGH;
+		is_only_low_or_high = true;
 	}
 
-	if (polarity == FLEXIO_PWM_ACTIVE_HIGH) {
-		timerConfig.timerOutput = kFLEXIO_TimerOutputOneNotAffectedByReset;
+	if (is_only_low_or_high) {
+		timerConfig.timerMode = kFLEXIO_TimerModeDisabled;
+	} else if (polarity == FLEXIO_PWM_ACTIVE_HIGH) {
 		timerConfig.timerMode = kFLEXIO_TimerModeDual8BitPWM;
 
 	} else {
-		timerConfig.timerOutput = kFLEXIO_TimerOutputZeroNotAffectedByReset;
 		timerConfig.timerMode = kFLEXIO_TimerModeDual8BitPWMLow;
 	}
 
@@ -151,6 +162,7 @@ static int pwm_nxp_flexio_set_cycles(const struct device *dev,
 		((uint8_t)(data->period_cycles[channel] - pulse_cycles - 1U)
 		 << FLEXIO_PWM_TIMCMP_CMP_UPPER_SHIFT);
 
+	timerConfig.timerOutput = kFLEXIO_TimerOutputZeroNotAffectedByReset;
 	timerConfig.timerDecrement = pwm_info->prescaler;
 	timerConfig.timerStop = kFLEXIO_TimerStopBitDisabled;
 	timerConfig.timerEnable = kFLEXIO_TimerEnabledAlways;

diff --git a/dts/arm/nxp/nxp_mcxw7x_common.dtsi b/dts/arm/nxp/nxp_mcxw7x_common.dtsi
@@ -351,6 +351,21 @@
 		interrupts = <18 0>;
 		clk-divider = <0x0>;
 	};
+
+	flexio: flexio@3a000 {
+		compatible = "nxp,flexio";
+		reg = <0x3a000 0x920>;
+		interrupts = <46 0>;
+		clocks = <&scg SCG_K4_FLEXIO_CLK 0xe8>;
+		status = "disabled";
+
+		flexio_pwm {
+			compatible = "nxp,flexio-pwm";
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+	};
+
 };
 
 &fast_peripheral0 {

diff --git a/include/zephyr/dt-bindings/clock/scg_k4.h b/include/zephyr/dt-bindings/clock/scg_k4.h
@@ -14,5 +14,6 @@
 #define SCG_K4_SIRC_CLK    6U
 #define SCG_K4_FIRC_CLK    7U
 #define SCG_K4_RTCOSC_CLK  8U
+#define SCG_K4_FLEXIO_CLK  9U
 
 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_SCG_K4_H_ */
diff --git a/soc/nxp/mcx/mcxw/soc.c b/soc/nxp/mcx/mcxw/soc.c
@@ -131,6 +131,8 @@ __weak void clock_init(void)
 	CLOCK_SetIpSrc(kCLOCK_Lpspi1, kCLOCK_IpSrcFro192M);
 	CLOCK_SetIpSrc(kCLOCK_Lpadc0, kCLOCK_IpSrcFro192M);
 	CLOCK_SetIpSrcDiv(kCLOCK_Lpadc0, kSCG_SysClkDivBy10);
+	CLOCK_SetIpSrc(kCLOCK_Flexio0, kCLOCK_IpSrcFro192M);
+	CLOCK_SetIpSrcDiv(kCLOCK_Flexio0, kSCG_SysClkDivBy6);
 
 	/* Ungate clocks if the peripheral is enabled in devicetree */
 	if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(gpioa), nxp_kinetis_gpio, okay)) {
@@ -192,6 +194,10 @@ __weak void clock_init(void)
 	if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ewm0), nxp_ewm, okay)) {
 		CLOCK_EnableClock(kCLOCK_Ewm0);
 	}
+
+	if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexio), nxp_flexio, okay)) {
+		CLOCK_EnableClock(kCLOCK_Flexio0);
+	}
 }
 
 static void vbat_init(void)

diff --git a/tests/drivers/pwm/pwm_api/boards/frdm_mcxw7x_flexio_pwm.overlay b/tests/drivers/pwm/pwm_api/boards/frdm_mcxw7x_flexio_pwm.overlay
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2025 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	aliases {
+		pwm-0 = &flexio_pwm;
+	};
+};
+
+/* Conflicting gpio pins */
+&flexcan0 {
+	status = "disabled";
+};
+
+&flexio {
+	status = "okay";
+	flexio_pwm: flexio_pwm {
+		status = "okay";
+		pinctrl-0 = <&pinmux_flexio_pwm>;
+		pinctrl-names = "default";
+
+		pwm_0 {
+			pin-id = <20>;
+			prescaler = <1>;
+		};
+	};
+};
diff --git a/tests/drivers/pwm/pwm_api/src/test_pwm.c b/tests/drivers/pwm/pwm_api/src/test_pwm.c
@@ -75,6 +75,11 @@
 #define DEFAULT_PULSE_CYCLE 16384
 #define DEFAULT_PERIOD_NSEC 2000000
 #define DEFAULT_PULSE_NSEC 500000
+#elif defined(CONFIG_SOC_SERIES_MCXW)
+#define DEFAULT_PERIOD_CYCLE 64000
+#define DEFAULT_PULSE_CYCLE 32000
+#define DEFAULT_PERIOD_NSEC 4000000
+#define DEFAULT_PULSE_NSEC 2000000
 #else
 #define DEFAULT_PERIOD_CYCLE 64000
 #define DEFAULT_PULSE_CYCLE 32000

diff --git a/tests/drivers/pwm/pwm_api/testcase.yaml b/tests/drivers/pwm/pwm_api/testcase.yaml
@@ -53,3 +53,16 @@ tests:
       - native_sim
     integration_platforms:
       - native_sim
+  drivers.pwm.mcxw7x_flexio_pwm:
+    tags:
+      - drivers
+      - pwm
+      - userspace
+    extra_args: DTC_OVERLAY_FILE="boards/frdm_mcxw7x_flexio_pwm.overlay"
+    platform_allow:
+      - frdm_mcxw71
+      - frdm_mcxw72/mcxw727c/cpu0
+    filter: (dt_alias_exists("pwm-0") or dt_alias_exists("pwm-1") or dt_alias_exists("pwm-2")
+      or dt_alias_exists("pwm-3")) and CONFIG_DT_HAS_NXP_FLEXIO_ENABLED and
+      CONFIG_DT_HAS_NXP_FLEXIO_PWM_ENABLED
+    depends_on: pwm
diff --git a/west.yml b/west.yml
@@ -210,7 +210,7 @@ manifest:
       groups:
         - hal
     - name: hal_nxp
-      revision: fc8aa27bba7ad1f8b98c04f991dae65ba38ec165
+      revision: pull/570/head
       path: modules/hal/nxp
       groups:
         - hal
-Original file line number
+Diff line change
@@ Expand Up / @@ -12,6 +12,7 @@ supported: @@
       - can
       - counter
       - flash
+      - flexio
       - gpio
       - i2c
       - pinctrl
@@ Expand Down @@