[AP][GP] Added Post-Global Placement Wirelength Estimation

vpr/src/analytical_place/global_placer.cpp

@@ -127,7 +127,8 @@ static void print_placement_stats(const PartialPlacement& p_placement,
                                   FlatPlacementDensityManager& density_manager,
                                   const PreClusterTimingManager& pre_cluster_timing_manager) {
     // Print the placement HPWL
-    VTR_LOG("\tPlacement HPWL: %f\n", p_placement.get_hpwl(ap_netlist));
+    VTR_LOG("\tPlacement objective HPWL: %f\n", p_placement.get_hpwl(ap_netlist));
+    VTR_LOG("\tPlacement estimated wirelength: %u\n", p_placement.estimate_post_placement_wirelength(ap_netlist));
 
     // Print the timing information.
     if (pre_cluster_timing_manager.is_valid()) {

vpr/src/analytical_place/partial_placement.cpp

@@ -33,6 +33,48 @@ double PartialPlacement::get_hpwl(const APNetlist& netlist) const {
     return hpwl;
 }
 
+double PartialPlacement::estimate_post_placement_wirelength(const APNetlist& netlist) const {
+    // Go through each net and calculate the half-perimeter wirelength. Since
+    // we want to estimate the post-placement wirelength, we do not want the
+    // flat placement positions of the blocks. Instead we compute the HPWL over
+    // the tiles that the flat placement is placing the blocks over.
+    unsigned total_hpwl = 0;
+    for (APNetId net_id : netlist.nets()) {
+        // Note: Other wirelength estimates in VTR ignore global nets; however
+        //       it is not known if a net is global or not until packing is
+        //       complete. For now, we just approximate post-placement wirelength
+        //       using the HPWL (in tile space).
+        // TODO: The reason we do not know what nets are ignored / global is
+        //       because the pin on the tile that the net connects to is what
+        //       decides if a net is global / ignored for place and route. Since
+        //       we have not packed anything yet, we do not know what pin each
+        //       net will go to; however, we can probably get a good idea based
+        //       on some properties of the net and the tile its going to / from.
+        //       Should investigate this to get a better estimate of wirelength.
+        double min_x = std::numeric_limits<unsigned>::max();
+        double max_x = std::numeric_limits<unsigned>::lowest();
+        double min_y = std::numeric_limits<unsigned>::max();
+        double max_y = std::numeric_limits<unsigned>::lowest();
+        for (APPinId pin_id : netlist.net_pins(net_id)) {
+            APBlockId blk_id = netlist.pin_block(pin_id);
+            min_x = std::min(min_x, block_x_locs[blk_id]);
+            max_x = std::max(max_x, block_x_locs[blk_id]);
+            min_y = std::min(min_y, block_y_locs[blk_id]);
+            max_y = std::max(max_y, block_y_locs[blk_id]);
+        }
+        VTR_ASSERT_SAFE(max_x >= min_x && max_y >= min_y);
+
+        // Floor the positions to get the x and y coordinates of the tiles each
+        // block belongs to.
+        unsigned tile_dx = std::floor(max_x) - std::floor(min_x);
+        unsigned tile_dy = std::floor(max_y) - std::floor(min_y);
+
+        total_hpwl += tile_dx + tile_dy;
+    }
+
+    return total_hpwl;
+}
+
 bool PartialPlacement::verify_locs(const APNetlist& netlist,
                                    size_t grid_width,
                                    size_t grid_height) const {

vpr/src/analytical_place/partial_placement.h

@@ -145,6 +145,15 @@ struct PartialPlacement {
      */
     double get_hpwl(const APNetlist& netlist) const;
 
+    /**
+     * @brief Estimate the wirelength of the current placement assuming that all
+     *        blocks will be placed exactly where they are in the partial placement.
+     *
+     * NOTE: This is an underestimate of the actual wirelength mainly due to
+     *       the placement not being legalized yet.
+     */
+    double estimate_post_placement_wirelength(const APNetlist& netlist) const;
+
     /**
      * @brief Verify the block_x_locs and block_y_locs vectors
      *

vtr_flow/parse/qor_config/qor_ap_fixed_chan_width.txt

@@ -2,7 +2,7 @@
 # channel width.
 
 vpr_status;output.txt;vpr_status=(.*)
-post_gp_hpwl;vpr.out;\s*Placement HPWL: (.*)
+post_gp_hpwl;vpr.out;\s*Placement estimated wirelength: (.*)
 post_fl_hpwl;vpr.out;Initial placement BB estimate of wirelength: (.*)
 post_dp_hpwl;vpr.out;BB estimate of min-dist \(placement\) wire length: (.*)
 total_wirelength;vpr.out;\s*Total wirelength: (\d+)