Add support for falling edge clocking

libs/EXTERNAL/libsdcparse/src/sdc_common.cpp

@@ -96,6 +96,31 @@ void add_sdc_create_clock(Callback& callback, const Lexer& lexer, CreateClock& s
      */
     callback.create_clock(sdc_create_clock);
 
+    //Prepare and create inverted version of the netlist clock.
+    //Use netlist clock from parsed SDC file (create_clock command)
+    //as a base for the inverted clock. It is created as virtual
+    //so that it won't interfere with existing netlist clock.
+    sdc_create_clock.is_virtual = true;
+    //Mark clock as inverted
+    sdc_create_clock.inverted = true;
+
+    //Virtual clocks must have empty targets, overwrite those
+    //but first save the names of the targets
+    auto targets = sdc_create_clock.targets.strings;
+    sdc_create_clock.targets = StringGroup();
+
+    //180 degrees phase shift is done with inverting
+    //the rise- and fall-edge times of the original netlist clock
+    double rise_edge = sdc_create_clock.rise_edge;
+    sdc_create_clock.rise_edge = sdc_create_clock.fall_edge;
+    sdc_create_clock.fall_edge = rise_edge;
+
+    //Create new inverted virtual clock for each target from original netlist clock.
+    for (auto &str : targets) {
+        //Use saved names of the original netlist clock targets as inverted clock names
+        sdc_create_clock.name = str + "_negedge";
+        callback.create_clock(sdc_create_clock);
+    }
 }
 
 /*

libs/EXTERNAL/libsdcparse/src/sdcparse.hpp

@@ -208,6 +208,7 @@ struct CreateClock {
     StringGroup targets;                        //The set of strings indicating clock sources.
                                                 // May be explicit strings or regexs.
     bool is_virtual = false;                    //Identifies this as a virtual (non-netlist) clock
+    bool inverted = false;                      //Identifies this as inverted version of netlist clock
 };
 
 struct SetIoDelay {

libs/EXTERNAL/libtatum/libtatum/tatum/TimingConstraints.cpp

@@ -20,6 +20,10 @@ std::string TimingConstraints::clock_domain_name(const DomainId id) const {
     return domain_names_[id];
 }
 
+bool TimingConstraints::clock_domain_inverted(const DomainId id) const {
+    return domain_inverted_[id];
+}
+
 NodeId TimingConstraints::clock_domain_source_node(const DomainId id) const {
     return domain_sources_[id];
 }
@@ -292,7 +296,8 @@ DomainId TimingConstraints::create_clock_domain(const std::string name) {
         //Create it
         id = DomainId(domain_ids_.size()); 
         domain_ids_.push_back(id); 
-
+
+        domain_inverted_.push_back(false);
         domain_names_.push_back(name);
         domain_sources_.emplace_back(NodeId::INVALID());
 
@@ -303,6 +308,24 @@ DomainId TimingConstraints::create_clock_domain(const std::string name) {
     return id; 
 }
 
+DomainId TimingConstraints::create_clock_domain(const std::string name, bool inverted) {
+    DomainId id = find_clock_domain(name);
+    if(!id) {
+        //Create it
+        id = DomainId(domain_ids_.size());
+        domain_ids_.push_back(id);
+
+        domain_inverted_.push_back(inverted);
+        domain_names_.push_back(name);
+        domain_sources_.emplace_back(NodeId::INVALID());
+
+        TATUM_ASSERT(clock_domain_name(id) == name);
+        TATUM_ASSERT(find_clock_domain(name) == id);
+    }
+
+    return id;
+}
+
 void TimingConstraints::set_setup_constraint(const DomainId src_domain, const DomainId sink_domain, const Time constraint) {
     set_setup_constraint(src_domain, sink_domain, NodeId::INVALID(), constraint);
 }

libs/EXTERNAL/libtatum/libtatum/tatum/TimingConstraints.hpp

@@ -42,10 +42,15 @@ class TimingConstraints {
         ///\returns The name of a clock domain
         std::string clock_domain_name(const DomainId id) const;
 
+        ///Checks whether the clock domain was marked as inverted. Inverted clocks are virtual clocks created from netlist clocks with 180 degree phase shift applied
+        ///\param id The ID of the clock domain
+        ///\returns whether the clock domain with specified domain id was marked as inverted
+        bool clock_domain_inverted(const DomainId id) const;
+
         ///\returns The source NodeId of the specified domain
         NodeId clock_domain_source_node(const DomainId id) const;
 
-        //\returns whether the specified domain id corresponds to a virtual lcock
+        //\returns whether the specified domain id corresponds to a virtual clock
         bool is_virtual_clock(const DomainId id) const;
 
         ///\returns The domain of the specified node id if it is a clock source
@@ -123,6 +128,7 @@ class TimingConstraints {
     public: //Mutators
         ///\returns The DomainId of the clock with the specified name (will be created if it doesn not exist)
         DomainId create_clock_domain(const std::string name);
+        DomainId create_clock_domain(const std::string name, bool inverted);
 
         ///Sets the setup constraint between src_domain and sink_domain with value constraint
         void set_setup_constraint(const DomainId src_domain, const DomainId sink_domain, const Time constraint);
@@ -170,6 +176,7 @@ class TimingConstraints {
     private: //Data
         tatum::util::linear_map<DomainId,DomainId> domain_ids_;
         tatum::util::linear_map<DomainId,std::string> domain_names_;
+        tatum::util::linear_map<DomainId, bool> domain_inverted_;
         tatum::util::linear_map<DomainId,NodeId> domain_sources_;
 
         std::unordered_set<NodeId> constant_generators_;

libs/EXTERNAL/libtatum/libtatum/tatum/TimingGraph.cpp

@@ -198,6 +198,32 @@ NodeId TimingGraph::add_node(const NodeType type) {
     return node_id;
 }
 
+NodeId TimingGraph::add_node(const NodeType type, TriggeringEdge trigg_edge) {
+    //Invalidate the levelization
+    is_levelized_ = false;
+
+    //Reserve an ID
+    NodeId node_id = NodeId(node_ids_.size());
+    node_ids_.push_back(node_id);
+
+    //Type
+    node_types_.push_back(type);
+
+    //Triggering Edge
+    trigg_edges_.push_back(trigg_edge);
+
+    //Edges
+    node_out_edges_.push_back(std::vector<EdgeId>());
+    node_in_edges_.push_back(std::vector<EdgeId>());
+
+    //Verify sizes
+    TATUM_ASSERT(node_types_.size() == node_out_edges_.size());
+    TATUM_ASSERT(node_types_.size() == node_in_edges_.size());
+
+    //Return the ID of the added node
+    return node_id;
+}
+
 EdgeId TimingGraph::add_edge(const EdgeType type, const NodeId src_node, const NodeId sink_node) {
     //We require that the source/sink node must already be in the graph,
     //  so we can update them with thier edge references
@@ -556,6 +582,7 @@ void TimingGraph::remap_nodes(const tatum::util::linear_map<NodeId,NodeId>& node
     node_types_ = clean_and_reorder_values(node_types_, node_id_map);
     node_in_edges_ = clean_and_reorder_values(node_in_edges_, node_id_map);
     node_out_edges_ = clean_and_reorder_values(node_out_edges_, node_id_map);
+    trigg_edges_ = clean_and_reorder_values(trigg_edges_, node_id_map);
 
     //Update references
     edge_src_nodes_ = update_all_refs(edge_src_nodes_, node_id_map);
@@ -597,7 +624,8 @@ bool TimingGraph::validate_sizes() const {
     if (   node_ids_.size() != node_types_.size()
         || node_ids_.size() != node_in_edges_.size()
         || node_ids_.size() != node_out_edges_.size()
-        || node_ids_.size() != node_levels_.size()) {
+        || node_ids_.size() != node_levels_.size()
+        || node_ids_.size() != trigg_edges_.size()) {
         throw tatum::Error("Inconsistent node attribute sizes");
     }
 

libs/EXTERNAL/libtatum/libtatum/tatum/TimingGraph.hpp

@@ -63,6 +63,13 @@
 
 namespace tatum {
 
+enum TriggeringEdge {
+    RISING_EDGE,
+    FALLING_EDGE,
+    DONT_CARE,
+    ERROR_EDGE
+};
+
 class TimingGraph {
     public: //Public types
         //Iterators
@@ -84,6 +91,29 @@ class TimingGraph {
         ///\returns The type of the node
         NodeType node_type(const NodeId id) const { return node_types_[id]; }
 
+        ///\param id The TimingGraph node ID
+        ///\returns TriggeringEdge enum describing the triggering edge of the TimingGraph node
+        TriggeringEdge trigg_edge(const NodeId id) const { return trigg_edges_[id]; }
+
+        ///\param id The TimingGraph node ID
+        ///\returns String describing the triggering edge of the TimingGraph node
+        std::string trigg_edge_str(const NodeId id) const {
+            switch(trigg_edges_[id]) {
+                      case TriggeringEdge::RISING_EDGE:
+                      return "RISING";
+                      break;
+                case TriggeringEdge::FALLING_EDGE:
+                      return "FALLING";
+                      break;
+                case TriggeringEdge::DONT_CARE:
+                      return "DONT_CARE";
+                      break;
+                default:
+                      return "ERROR";
+                      break;
+            }
+        }
+
         ///\param id The node id
         ///\returns A range of all out-going edges the node drives
         edge_range node_out_edges(const NodeId id) const { return tatum::util::make_range(node_out_edges_[id].begin(), node_out_edges_[id].end()); }
@@ -198,6 +228,7 @@ class TimingGraph {
         ///\param type The type of the node to be added
         ///\warning Graph will likely need to be re-levelized after modification
         NodeId add_node(const NodeType type);
+        NodeId add_node(const NodeType type, TriggeringEdge trigg_edge);
 
         ///Adds an edge to the timing graph
         ///\param type The edge's type
@@ -282,6 +313,7 @@ class TimingGraph {
         //Node data
         tatum::util::linear_map<NodeId,NodeId> node_ids_; //The node IDs in the graph
         tatum::util::linear_map<NodeId,NodeType> node_types_; //Type of node
+        tatum::util::linear_map<NodeId,TriggeringEdge> trigg_edges_; //Triggering edge of the clock
         tatum::util::linear_map<NodeId,std::vector<EdgeId>> node_in_edges_; //Incomiing edge IDs for node
         tatum::util::linear_map<NodeId,std::vector<EdgeId>> node_out_edges_; //Out going edge IDs for node
         tatum::util::linear_map<NodeId,LevelId> node_levels_; //Out going edge IDs for node
@@ -334,7 +366,5 @@ struct GraphIdMaps {
     tatum::util::linear_map<EdgeId,EdgeId> edge_id_map;
 };
 
-
-
 } //namepsace
 

libs/EXTERNAL/libtatum/libtatum/tatum/graph_visitors/CommonAnalysisVisitor.hpp

@@ -294,6 +294,7 @@ bool CommonAnalysisVisitor<AnalysisOps>::do_arrival_traverse_edge(const TimingGr
 
     //Pulling values from upstream source node
     NodeId src_node_id = tg.edge_src_node(edge_id);
+    NodeId sink_node_id = tg.edge_sink_node(edge_id);
 
     if(should_propagate_clocks(tg, tc, edge_id)) {
         /*
@@ -311,7 +312,6 @@ bool CommonAnalysisVisitor<AnalysisOps>::do_arrival_traverse_edge(const TimingGr
 
                 for(const TimingTag& src_launch_clk_tag : src_launch_clk_tags) {
                     //Standard propagation through the clock network
-
                     Time new_arr = src_launch_clk_tag.time() + clk_launch_edge_delay;
                     timing_modified |= ops_.merge_arr_tags(node_id, new_arr, src_node_id, src_launch_clk_tag);
 
@@ -328,6 +328,28 @@ bool CommonAnalysisVisitor<AnalysisOps>::do_arrival_traverse_edge(const TimingGr
 
                 for(const TimingTag& src_capture_clk_tag : src_capture_clk_tags) {
                     //Standard propagation through the clock network
+
+                   /*
+                    * Each source capture tag may be related to clock domain of one of the two types:
+                    * 1. clock domain created for netlist clock, meant to be used with cells clocked at the rising edge
+                    * 2. inverted virtual clock domain based on existing netlist clock.
+                    *    It is 180 degree phase shifted in relation to netlist clock
+                    *    and it is used in timing analysis for cells clocked at falling edge.
+                    *
+                    * The triggering edges of FFs should be taken into account when propagating tags
+                    * to CPIN nodes. Tags of types which are incompatible with triggering edges
+                    * of the FF clock inputs shouldn't be propagated because having those wouldn't allow
+                    * timing analysis to calculate correct timings for transfers between cells
+                    * clocked rising and falling edges of the same clock.
+                    */
+                    if ( tg.node_type(sink_node_id) == NodeType::CPIN ) {
+                        if ((tg.trigg_edge(sink_node_id) == TriggeringEdge::FALLING_EDGE && !tc.clock_domain_inverted(src_capture_clk_tag.launch_clock_domain())) ||
+                            (tg.trigg_edge(sink_node_id) == TriggeringEdge::RISING_EDGE &&  tc.clock_domain_inverted(src_capture_clk_tag.launch_clock_domain()))) {
+                            //Skip propagation of timings derived from incompatible constraints
+                            continue;
+                        }
+                    }
+
                     timing_modified |= ops_.merge_arr_tags(node_id, src_capture_clk_tag.time() + clk_capture_edge_delay, src_node_id, src_capture_clk_tag);
                 }
             }

libs/EXTERNAL/libtatum/libtatum/tatum/report/graphviz_dot_writer.cpp

@@ -120,7 +120,7 @@ void GraphvizDotWriter::write_dot_node(std::ostream& os,
     os << "\t";
     os << node_name(node);
     os << "[label=\"";
-    os << "{" << node << " (" << tg_.node_type(node) << ")";
+    os << "{" << node << " (" << tg_.node_type(node) << ") TEdge(" << tg_.trigg_edge_str(node) << ")";
 
     for(const auto& tag_set : {tags, slacks}) {
         for(const auto& tag : tag_set) {