FPGA interchange: add RR graph generation#1999

acomodi wants to merge 19 commits intoverilog-to-routing:masterverilog-to-routing/vtr-verilog-to-routing:masterfrom

antmicro:acom/fpga-interchange-rr-graph+constantsantmicro/vtr-verilog-to-routing:acom/fpga-interchange-rr-graph+constantsCopy head branch name to clipboard