updated readme to reflect changes in FPGA design

verilog-indeed · Aug 13, 2022 · 858997a · 858997a
1 parent e69e49b
commit 858997a
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/README.md b/README.md
@@ -21,7 +21,7 @@ If you've got any question reach me out on Twitter @verilog_indeed
 
 4. Connect the board with the USB cable to your computer, open the Programmer **provided specifically by Sipeed** in "MCU Mode->Firmware Erase, Program" operation. 
 
-   For the bitstream (first field) select the bitstream from the "gowin_empu" FPGA project     (nano_4k_empu/gowin_empu/impl/pnr/gowin_empu.fs).
+   For the bitstream (first field) select the bitstream from the "gowin_empu" FPGA project     (nano_4k_empu/impl/pnr/nano_4k_empu.fs).
 
    For the MCU firmware (second field) select the binary generated by the GMD project (nano_4k_1602_lcd/Debug/nano_4k_1602_lcd.bin)