STM32H7 Multicore FIR is a finite impulse response filter implementation for a family of multicore processors from STM32 - family H7. The algorithm runs in parallel on both cores and this helps users to achieve high sampling frequencies or higher FIR filter order.
To receive the clock and data from clock and data interfaces, apply the DSP algorithm on the transmitted data. The DSP algorithm includes differential encoding, scrambling and convolutional encoding, generate test data pattern to be used in the self-test mode of operation
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