A System Verilog RISC-V processor implementation.
The implementation of the project is guided by the book "Sarah Harris, David Harris - Digital Design and Computer Architecture_ RISC-V Edition-Morgan Kaufmann (2021)". Furthermore, the repository follows a similar structure to that described in Chapter 7 of the book.
The book website http://pages.hmc.edu/harris/ddca/ddcarv.html contains the following resources:
- HDL: VHDL, SV, V
- Lab exercise and solutions.
- Video tutorials