Allow re-combining TX/RX pair to serial port.

reitermarkus · reitermarkus · commit 8e63159dd12f · 2022-05-15T06:14:46.000+02:00
diff --git a/src/serial.rs b/src/serial.rs
@@ -206,20 +206,20 @@ impl From<Bps> for Config {
 
 /// Serial abstraction
 pub struct Serial<USART, PINS> {
-    usart: USART,
-    pins: PINS,
-    tx: Tx<USART>,
-    rx: Rx<USART>,
+    tx: Tx<USART, PINS>,
+    rx: Rx<USART, PINS>,
 }
 
 /// Serial receiver
-pub struct Rx<USART> {
+pub struct Rx<USART, PINS> {
     _usart: PhantomData<USART>,
+    pins: PINS,
 }
 
 /// Serial transmitter
-pub struct Tx<USART> {
-    _usart: PhantomData<USART>,
+pub struct Tx<USART, PINS> {
+    usart: USART,
+    pins: PhantomData<PINS>,
 }
 
 macro_rules! hal {
@@ -375,29 +375,33 @@ macro_rules! hal {
                         .modify(|_, w| w.ue().set_bit().re().set_bit().te().set_bit());
 
                     Serial {
-                      usart, pins,
-                      tx: Tx { _usart: PhantomData },
-                      rx: Rx { _usart: PhantomData },
+                        tx: Tx { usart, pins: PhantomData },
+                        rx: Rx { _usart: PhantomData, pins },
                     }
                 }
 
+                #[inline]
+                fn usart(&self) -> &pac::$USARTX {
+                    &self.tx.usart
+                }
+
                 /// Starts listening for an interrupt event
                 pub fn listen(&mut self, event: Event) {
                     match event {
                         Event::Rxne => {
-                            self.usart.cr1.modify(|_, w| w.rxneie().set_bit())
+                            self.usart().cr1.modify(|_, w| w.rxneie().set_bit())
                         },
                         Event::Txe => {
-                            self.usart.cr1.modify(|_, w| w.txeie().set_bit())
+                            self.usart().cr1.modify(|_, w| w.txeie().set_bit())
                         },
                         Event::Idle => {
-                            self.usart.cr1.modify(|_, w| w.idleie().set_bit())
+                            self.usart().cr1.modify(|_, w| w.idleie().set_bit())
                         },
                         Event::CharacterMatch => {
-                            self.usart.cr1.modify(|_, w| w.cmie().set_bit())
+                            self.usart().cr1.modify(|_, w| w.cmie().set_bit())
                         },
                         Event::ReceiverTimeout => {
-                            self.usart.cr1.modify(|_, w| w.rtoie().set_bit())
+                            self.usart().cr1.modify(|_, w| w.rtoie().set_bit())
                         },
                     }
                 }
@@ -434,25 +438,25 @@ macro_rules! hal {
                 pub fn unlisten(&mut self, event: Event) {
                     match event {
                         Event::Rxne => {
-                            self.usart.cr1.modify(|_, w| w.rxneie().clear_bit())
+                            self.usart().cr1.modify(|_, w| w.rxneie().clear_bit())
                         },
                         Event::Txe => {
-                            self.usart.cr1.modify(|_, w| w.txeie().clear_bit())
+                            self.usart().cr1.modify(|_, w| w.txeie().clear_bit())
                         },
                         Event::Idle => {
-                            self.usart.cr1.modify(|_, w| w.idleie().clear_bit())
+                            self.usart().cr1.modify(|_, w| w.idleie().clear_bit())
                         },
                         Event::CharacterMatch => {
-                            self.usart.cr1.modify(|_, w| w.cmie().clear_bit())
+                            self.usart().cr1.modify(|_, w| w.cmie().clear_bit())
                         },
                         Event::ReceiverTimeout => {
-                            self.usart.cr1.modify(|_, w| w.rtoie().clear_bit())
+                            self.usart().cr1.modify(|_, w| w.rtoie().clear_bit())
                         },
                     }
                 }
 
                 /// Splits the `Serial` abstraction into a transmitter and a receiver half
-                pub fn split(self) -> (Tx<pac::$USARTX>, Rx<pac::$USARTX>) {
+                pub fn split(self) -> (Tx<pac::$USARTX, PINS>, Rx<pac::$USARTX, PINS>) {
                     (
                         self.tx,
                         self.rx,
@@ -461,7 +465,7 @@ macro_rules! hal {
 
                 /// Frees the USART peripheral
                 pub fn release(self) -> (pac::$USARTX, PINS) {
-                    (self.usart, self.pins)
+                    (self.tx.usart, self.rx.pins)
                 }
             }
 
@@ -473,7 +477,7 @@ macro_rules! hal {
                 }
             }
 
-            impl serial::Read<u8> for Rx<pac::$USARTX> {
+            impl<PINS> serial::Read<u8> for Rx<pac::$USARTX, PINS> {
                 type Error = Error;
 
                 fn read(&mut self) -> nb::Result<u8, Error> {
@@ -505,7 +509,7 @@ macro_rules! hal {
                 }
             }
 
-            impl serial::Write<u8> for Tx<pac::$USARTX> {
+            impl<PINS> serial::Write<u8> for Tx<pac::$USARTX, PINS> {
                 // NOTE(Void) See section "29.7 USART interrupts"; the only possible errors during
                 // transmission are: clear to send (which is disabled in this case) errors and
                 // framing errors (which only occur in SmartCard mode); neither of these apply to
@@ -540,23 +544,22 @@ macro_rules! hal {
                 }
             }
 
-            impl embedded_hal::blocking::serial::write::Default<u8>
-                for Tx<pac::$USARTX> {}
+            impl<PINS> embedded_hal::blocking::serial::write::Default<u8> for Tx<pac::$USARTX, PINS> {}
 
-            pub type $rxdma = RxDma<Rx<pac::$USARTX>, $dmarxch>;
-            pub type $txdma = TxDma<Tx<pac::$USARTX>, $dmatxch>;
+            pub type $rxdma<PINS> = RxDma<Rx<pac::$USARTX, PINS>, $dmarxch>;
+            pub type $txdma<PINS> = TxDma<Tx<pac::$USARTX, PINS>, $dmatxch>;
 
-            impl Receive for $rxdma {
+            impl<PINS> Receive for $rxdma<PINS> {
                 type RxChannel = $dmarxch;
                 type TransmittedWord = u8;
             }
 
-            impl Transmit for $txdma {
+            impl<PINS> Transmit for $txdma<PINS> {
                 type TxChannel = $dmatxch;
                 type ReceivedWord = u8;
             }
 
-            impl TransferPayload for $rxdma {
+            impl<PINS> TransferPayload for $rxdma<PINS> {
                 fn start(&mut self) {
                     self.channel.start();
                 }
@@ -565,7 +568,7 @@ macro_rules! hal {
                 }
             }
 
-            impl TransferPayload for $txdma {
+            impl<PINS> TransferPayload for $txdma<PINS> {
                 fn start(&mut self) {
                     self.channel.start();
                 }
@@ -574,8 +577,8 @@ macro_rules! hal {
                 }
             }
 
-            impl Rx<pac::$USARTX> {
-                pub fn with_dma(self, channel: $dmarxch) -> $rxdma {
+            impl<PINS> Rx<pac::$USARTX, PINS> {
+                pub fn with_dma(self, channel: $dmarxch) -> $rxdma<PINS> {
                     RxDma {
                         payload: self,
                         channel,
@@ -643,37 +646,37 @@ macro_rules! hal {
                 }
             }
 
-            impl crate::dma::CharacterMatch for Rx<pac::$USARTX> {
+            impl<PINS> crate::dma::CharacterMatch for Rx<pac::$USARTX, PINS> {
                 /// Checks to see if the USART peripheral has detected an character match and
                 /// clears the flag
                 fn check_character_match(&mut self, clear: bool) -> bool {
                     self.check_character_match(clear)
                 }
             }
 
-            impl crate::dma::ReceiverTimeout for Rx<pac::$USARTX> {
+            impl<PINS> crate::dma::ReceiverTimeout for Rx<pac::$USARTX, PINS> {
                 fn check_receiver_timeout(&mut self, clear: bool) -> bool {
                     self.is_receiver_timeout(clear)
                 }
             }
 
-            impl crate::dma::OperationError<(), Error> for Rx<pac::$USARTX>{
+            impl<PINS> crate::dma::OperationError<(), Error> for Rx<pac::$USARTX, PINS> {
                 fn check_operation_error(&mut self) -> Result<(), Error> {
                     self.check_for_error()
                 }
             }
 
-            impl Tx<pac::$USARTX> {
-                pub fn with_dma(self, channel: $dmatxch) -> $txdma {
+            impl<PINS> Tx<pac::$USARTX, PINS> {
+                pub fn with_dma(self, channel: $dmatxch) -> $txdma<PINS> {
                     TxDma {
                         payload: self,
                         channel,
                     }
                 }
             }
 
-            impl $rxdma {
-                pub fn split(mut self) -> (Rx<pac::$USARTX>, $dmarxch) {
+            impl<PINS> $rxdma<PINS> {
+                pub fn split(mut self) -> (Rx<pac::$USARTX, PINS>, $dmarxch) {
                     self.stop();
                     let RxDma {payload, channel} = self;
                     (
@@ -683,8 +686,8 @@ macro_rules! hal {
                 }
             }
 
-            impl $txdma {
-                pub fn split(mut self) -> (Tx<pac::$USARTX>, $dmatxch) {
+            impl<PINS> $txdma<PINS> {
+                pub fn split(mut self) -> (Tx<pac::$USARTX, PINS>, $dmatxch) {
                     self.stop();
                     let TxDma {payload, channel} = self;
                     (
@@ -694,7 +697,7 @@ macro_rules! hal {
                 }
             }
 
-            impl<B> crate::dma::CircReadDma<B, u8> for $rxdma
+            impl<B, PINS> crate::dma::CircReadDma<B, u8> for $rxdma<PINS>
             where
                 &'static mut B: StaticWriteBuffer<Word = u8>,
                 B: 'static,
@@ -746,7 +749,7 @@ macro_rules! hal {
                 }
             }
 
-            impl $rxdma {
+            impl<PINS> $rxdma<PINS> {
                 /// Create a frame reader that can either react on the Character match interrupt or
                 /// Transfer Complete from the DMA.
                 pub fn frame_reader<BUFFER, const N: usize>(
@@ -796,7 +799,7 @@ macro_rules! hal {
                 }
             }
 
-            impl $txdma {
+            impl<PINS> $txdma<PINS> {
                 /// Creates a new DMA frame sender
                 pub fn frame_sender<BUFFER, const N: usize>(
                     mut self,
@@ -836,6 +839,14 @@ macro_rules! hal {
     }
 }
 
+impl<USART, PINS> From<(Tx<USART, PINS>, Rx<USART, PINS>)> for Serial<USART, PINS> {
+    /// Convert a transmitter/receiver back to a combined serial port.
+    fn from(txrx: (Tx<USART, PINS>, Rx<USART, PINS>)) -> Self {
+        let (tx, rx) = txrx;
+        Self { tx, rx }
+    }
+}
+
 hal! {
     USART1: (usart1, pclk2, tx: (TxDma1, dma1::C4, DmaInput::Usart1Tx), rx: (RxDma1, dma1::C5, DmaInput::Usart1Rx)),
     USART2: (usart2, pclk1, tx: (TxDma2, dma1::C7, DmaInput::Usart2Tx), rx: (RxDma2, dma1::C6, DmaInput::Usart2Rx)),
@@ -905,9 +916,9 @@ where
     }
 }
 
-impl<USART> fmt::Write for Tx<USART>
+impl<USART, PINS> fmt::Write for Tx<USART, PINS>
 where
-    Tx<USART>: crate::hal::serial::Write<u8>,
+    Tx<USART, PINS>: crate::hal::serial::Write<u8>,
 {
     fn write_str(&mut self, s: &str) -> fmt::Result {
         let _ = s

Original file line number	Diff line number	Diff line change
`@@ -206,20 +206,20 @@ impl From<Bps> for Config {`
`206`	`206`
`207`	`207`	`/// Serial abstraction`
`208`	`208`	`pub struct Serial<USART, PINS> {`
`209`		`- usart: USART,`
`210`		`- pins: PINS,`
`211`		`- tx: Tx<USART>,`
`212`		`- rx: Rx<USART>,`
	`209`	`+ tx: Tx<USART, PINS>,`
	`210`	`+ rx: Rx<USART, PINS>,`
`213`	`211`	`}`
`214`	`212`
`215`	`213`	`/// Serial receiver`
`216`		`-pub struct Rx<USART> {`
	`214`	`+pub struct Rx<USART, PINS> {`
`217`	`215`	`_usart: PhantomData<USART>,`
	`216`	`+ pins: PINS,`
`218`	`217`	`}`
`219`	`218`
`220`	`219`	`/// Serial transmitter`
`221`		`-pub struct Tx<USART> {`
`222`		`- _usart: PhantomData<USART>,`
	`220`	`+pub struct Tx<USART, PINS> {`
	`221`	`+ usart: USART,`
	`222`	`+ pins: PhantomData<PINS>,`
`223`	`223`	`}`
`224`	`224`
`225`	`225`	`macro_rules! hal {`
`@@ -375,29 +375,33 @@ macro_rules! hal {`
`375`	`375`	`.modify(\|_, w\| w.ue().set_bit().re().set_bit().te().set_bit());`
`376`	`376`
`377`	`377`	`Serial {`
`378`		`- usart, pins,`
`379`		`- tx: Tx { _usart: PhantomData },`
`380`		`- rx: Rx { _usart: PhantomData },`
	`378`	`+ tx: Tx { usart, pins: PhantomData },`
	`379`	`+ rx: Rx { _usart: PhantomData, pins },`
`381`	`380`	`}`
`382`	`381`	`}`
`383`	`382`
	`383`	`+ #[inline]`
	`384`	`+ fn usart(&self) -> &pac::$USARTX {`
	`385`	`+ &self.tx.usart`
	`386`	`+ }`
	`387`	`+`
`384`	`388`	`/// Starts listening for an interrupt event`
`385`	`389`	`pub fn listen(&mut self, event: Event) {`
`386`	`390`	`match event {`
`387`	`391`	`Event::Rxne => {`
`388`		`- self.usart.cr1.modify(\|_, w\| w.rxneie().set_bit())`
	`392`	`+ self.usart().cr1.modify(\|_, w\| w.rxneie().set_bit())`
`389`	`393`	`},`
`390`	`394`	`Event::Txe => {`
`391`		`- self.usart.cr1.modify(\|_, w\| w.txeie().set_bit())`
	`395`	`+ self.usart().cr1.modify(\|_, w\| w.txeie().set_bit())`
`392`	`396`	`},`
`393`	`397`	`Event::Idle => {`
`394`		`- self.usart.cr1.modify(\|_, w\| w.idleie().set_bit())`
	`398`	`+ self.usart().cr1.modify(\|_, w\| w.idleie().set_bit())`
`395`	`399`	`},`
`396`	`400`	`Event::CharacterMatch => {`
`397`		`- self.usart.cr1.modify(\|_, w\| w.cmie().set_bit())`
	`401`	`+ self.usart().cr1.modify(\|_, w\| w.cmie().set_bit())`
`398`	`402`	`},`
`399`	`403`	`Event::ReceiverTimeout => {`
`400`		`- self.usart.cr1.modify(\|_, w\| w.rtoie().set_bit())`
	`404`	`+ self.usart().cr1.modify(\|_, w\| w.rtoie().set_bit())`
`401`	`405`	`},`
`402`	`406`	`}`
`403`	`407`	`}`
`@@ -434,25 +438,25 @@ macro_rules! hal {`
`434`	`438`	`pub fn unlisten(&mut self, event: Event) {`
`435`	`439`	`match event {`
`436`	`440`	`Event::Rxne => {`
`437`		`- self.usart.cr1.modify(\|_, w\| w.rxneie().clear_bit())`
	`441`	`+ self.usart().cr1.modify(\|_, w\| w.rxneie().clear_bit())`
`438`	`442`	`},`
`439`	`443`	`Event::Txe => {`
`440`		`- self.usart.cr1.modify(\|_, w\| w.txeie().clear_bit())`
	`444`	`+ self.usart().cr1.modify(\|_, w\| w.txeie().clear_bit())`
`441`	`445`	`},`
`442`	`446`	`Event::Idle => {`
`443`		`- self.usart.cr1.modify(\|_, w\| w.idleie().clear_bit())`
	`447`	`+ self.usart().cr1.modify(\|_, w\| w.idleie().clear_bit())`
`444`	`448`	`},`
`445`	`449`	`Event::CharacterMatch => {`
`446`		`- self.usart.cr1.modify(\|_, w\| w.cmie().clear_bit())`
	`450`	`+ self.usart().cr1.modify(\|_, w\| w.cmie().clear_bit())`
`447`	`451`	`},`
`448`	`452`	`Event::ReceiverTimeout => {`
`449`		`- self.usart.cr1.modify(\|_, w\| w.rtoie().clear_bit())`
	`453`	`+ self.usart().cr1.modify(\|_, w\| w.rtoie().clear_bit())`
`450`	`454`	`},`
`451`	`455`	`}`
`452`	`456`	`}`
`453`	`457`
`454`	`458`	/// Splits the `Serial` abstraction into a transmitter and a receiver half
`455`		`- pub fn split(self) -> (Tx<pac::$USARTX>, Rx<pac::$USARTX>) {`
	`459`	`+ pub fn split(self) -> (Tx<pac::$USARTX, PINS>, Rx<pac::$USARTX, PINS>) {`
`456`	`460`	`(`
`457`	`461`	`self.tx,`
`458`	`462`	`self.rx,`
`@@ -461,7 +465,7 @@ macro_rules! hal {`
`461`	`465`
`462`	`466`	`/// Frees the USART peripheral`
`463`	`467`	`pub fn release(self) -> (pac::$USARTX, PINS) {`
`464`		`- (self.usart, self.pins)`
	`468`	`+ (self.tx.usart, self.rx.pins)`
`465`	`469`	`}`
`466`	`470`	`}`
`467`	`471`
`@@ -473,7 +477,7 @@ macro_rules! hal {`
`473`	`477`	`}`
`474`	`478`	`}`
`475`	`479`
`476`		`- impl serial::Read<u8> for Rx<pac::$USARTX> {`
	`480`	`+ impl<PINS> serial::Read<u8> for Rx<pac::$USARTX, PINS> {`
`477`	`481`	`type Error = Error;`
`478`	`482`
`479`	`483`	`fn read(&mut self) -> nb::Result<u8, Error> {`
`@@ -505,7 +509,7 @@ macro_rules! hal {`
`505`	`509`	`}`
`506`	`510`	`}`
`507`	`511`
`508`		`- impl serial::Write<u8> for Tx<pac::$USARTX> {`
	`512`	`+ impl<PINS> serial::Write<u8> for Tx<pac::$USARTX, PINS> {`
`509`	`513`	`// NOTE(Void) See section "29.7 USART interrupts"; the only possible errors during`
`510`	`514`	`// transmission are: clear to send (which is disabled in this case) errors and`
`511`	`515`	`// framing errors (which only occur in SmartCard mode); neither of these apply to`
`@@ -540,23 +544,22 @@ macro_rules! hal {`
`540`	`544`	`}`
`541`	`545`	`}`
`542`	`546`
`543`		`- impl embedded_hal::blocking::serial::write::Default<u8>`
`544`		`- for Tx<pac::$USARTX> {}`
	`547`	`+ impl<PINS> embedded_hal::blocking::serial::write::Default<u8> for Tx<pac::$USARTX, PINS> {}`
`545`	`548`
`546`		`- pub type $rxdma = RxDma<Rx<pac::$USARTX>, $dmarxch>;`
`547`		`- pub type $txdma = TxDma<Tx<pac::$USARTX>, $dmatxch>;`
	`549`	`+ pub type $rxdma<PINS> = RxDma<Rx<pac::$USARTX, PINS>, $dmarxch>;`
	`550`	`+ pub type $txdma<PINS> = TxDma<Tx<pac::$USARTX, PINS>, $dmatxch>;`
`548`	`551`
`549`		`- impl Receive for $rxdma {`
	`552`	`+ impl<PINS> Receive for $rxdma<PINS> {`
`550`	`553`	`type RxChannel = $dmarxch;`
`551`	`554`	`type TransmittedWord = u8;`
`552`	`555`	`}`
`553`	`556`
`554`		`- impl Transmit for $txdma {`
	`557`	`+ impl<PINS> Transmit for $txdma<PINS> {`
`555`	`558`	`type TxChannel = $dmatxch;`
`556`	`559`	`type ReceivedWord = u8;`
`557`	`560`	`}`
`558`	`561`
`559`		`- impl TransferPayload for $rxdma {`
	`562`	`+ impl<PINS> TransferPayload for $rxdma<PINS> {`
`560`	`563`	`fn start(&mut self) {`
`561`	`564`	`self.channel.start();`
`562`	`565`	`}`
`@@ -565,7 +568,7 @@ macro_rules! hal {`
`565`	`568`	`}`
`566`	`569`	`}`
`567`	`570`
`568`		`- impl TransferPayload for $txdma {`
	`571`	`+ impl<PINS> TransferPayload for $txdma<PINS> {`
`569`	`572`	`fn start(&mut self) {`
`570`	`573`	`self.channel.start();`
`571`	`574`	`}`
`@@ -574,8 +577,8 @@ macro_rules! hal {`
`574`	`577`	`}`
`575`	`578`	`}`
`576`	`579`
`577`		`- impl Rx<pac::$USARTX> {`
`578`		`- pub fn with_dma(self, channel: $dmarxch) -> $rxdma {`
	`580`	`+ impl<PINS> Rx<pac::$USARTX, PINS> {`
	`581`	`+ pub fn with_dma(self, channel: $dmarxch) -> $rxdma<PINS> {`
`579`	`582`	`RxDma {`
`580`	`583`	`payload: self,`
`581`	`584`	`channel,`
`@@ -643,37 +646,37 @@ macro_rules! hal {`
`643`	`646`	`}`
`644`	`647`	`}`
`645`	`648`
`646`		`- impl crate::dma::CharacterMatch for Rx<pac::$USARTX> {`
	`649`	`+ impl<PINS> crate::dma::CharacterMatch for Rx<pac::$USARTX, PINS> {`
`647`	`650`	`/// Checks to see if the USART peripheral has detected an character match and`
`648`	`651`	`/// clears the flag`
`649`	`652`	`fn check_character_match(&mut self, clear: bool) -> bool {`
`650`	`653`	`self.check_character_match(clear)`
`651`	`654`	`}`
`652`	`655`	`}`
`653`	`656`
`654`		`- impl crate::dma::ReceiverTimeout for Rx<pac::$USARTX> {`
	`657`	`+ impl<PINS> crate::dma::ReceiverTimeout for Rx<pac::$USARTX, PINS> {`
`655`	`658`	`fn check_receiver_timeout(&mut self, clear: bool) -> bool {`
`656`	`659`	`self.is_receiver_timeout(clear)`
`657`	`660`	`}`
`658`	`661`	`}`
`659`	`662`
`660`		`- impl crate::dma::OperationError<(), Error> for Rx<pac::$USARTX>{`
	`663`	`+ impl<PINS> crate::dma::OperationError<(), Error> for Rx<pac::$USARTX, PINS> {`
`661`	`664`	`fn check_operation_error(&mut self) -> Result<(), Error> {`
`662`	`665`	`self.check_for_error()`
`663`	`666`	`}`
`664`	`667`	`}`
`665`	`668`
`666`		`- impl Tx<pac::$USARTX> {`
`667`		`- pub fn with_dma(self, channel: $dmatxch) -> $txdma {`
	`669`	`+ impl<PINS> Tx<pac::$USARTX, PINS> {`
	`670`	`+ pub fn with_dma(self, channel: $dmatxch) -> $txdma<PINS> {`
`668`	`671`	`TxDma {`
`669`	`672`	`payload: self,`
`670`	`673`	`channel,`
`671`	`674`	`}`
`672`	`675`	`}`
`673`	`676`	`}`
`674`	`677`
`675`		`- impl $rxdma {`
`676`		`- pub fn split(mut self) -> (Rx<pac::$USARTX>, $dmarxch) {`
	`678`	`+ impl<PINS> $rxdma<PINS> {`
	`679`	`+ pub fn split(mut self) -> (Rx<pac::$USARTX, PINS>, $dmarxch) {`
`677`	`680`	`self.stop();`
`678`	`681`	`let RxDma {payload, channel} = self;`
`679`	`682`	`(`
`@@ -683,8 +686,8 @@ macro_rules! hal {`
`683`	`686`	`}`
`684`	`687`	`}`
`685`	`688`
`686`		`- impl $txdma {`
`687`		`- pub fn split(mut self) -> (Tx<pac::$USARTX>, $dmatxch) {`
	`689`	`+ impl<PINS> $txdma<PINS> {`
	`690`	`+ pub fn split(mut self) -> (Tx<pac::$USARTX, PINS>, $dmatxch) {`
`688`	`691`	`self.stop();`
`689`	`692`	`let TxDma {payload, channel} = self;`
`690`	`693`	`(`
`@@ -694,7 +697,7 @@ macro_rules! hal {`
`694`	`697`	`}`
`695`	`698`	`}`
`696`	`699`
`697`		`- impl<B> crate::dma::CircReadDma<B, u8> for $rxdma`
	`700`	`+ impl<B, PINS> crate::dma::CircReadDma<B, u8> for $rxdma<PINS>`
`698`	`701`	`where`
`699`	`702`	`&'static mut B: StaticWriteBuffer<Word = u8>,`
`700`	`703`	`B: 'static,`
`@@ -746,7 +749,7 @@ macro_rules! hal {`
`746`	`749`	`}`
`747`	`750`	`}`
`748`	`751`
`749`		`- impl $rxdma {`
	`752`	`+ impl<PINS> $rxdma<PINS> {`
`750`	`753`	`/// Create a frame reader that can either react on the Character match interrupt or`
`751`	`754`	`/// Transfer Complete from the DMA.`
`752`	`755`	`pub fn frame_reader<BUFFER, const N: usize>(`
`@@ -796,7 +799,7 @@ macro_rules! hal {`
`796`	`799`	`}`
`797`	`800`	`}`
`798`	`801`
`799`		`- impl $txdma {`
	`802`	`+ impl<PINS> $txdma<PINS> {`
`800`	`803`	`/// Creates a new DMA frame sender`
`801`	`804`	`pub fn frame_sender<BUFFER, const N: usize>(`
`802`	`805`	`mut self,`
`@@ -836,6 +839,14 @@ macro_rules! hal {`
`836`	`839`	`}`
`837`	`840`	`}`
`838`	`841`
	`842`	`+impl<USART, PINS> From<(Tx<USART, PINS>, Rx<USART, PINS>)> for Serial<USART, PINS> {`
	`843`	`+ /// Convert a transmitter/receiver back to a combined serial port.`
	`844`	`+ fn from(txrx: (Tx<USART, PINS>, Rx<USART, PINS>)) -> Self {`
	`845`	`+ let (tx, rx) = txrx;`
	`846`	`+ Self { tx, rx }`
	`847`	`+ }`
	`848`	`+}`
	`849`	`+`
`839`	`850`	`hal! {`
`840`	`851`	`USART1: (usart1, pclk2, tx: (TxDma1, dma1::C4, DmaInput::Usart1Tx), rx: (RxDma1, dma1::C5, DmaInput::Usart1Rx)),`
`841`	`852`	`USART2: (usart2, pclk1, tx: (TxDma2, dma1::C7, DmaInput::Usart2Tx), rx: (RxDma2, dma1::C6, DmaInput::Usart2Rx)),`
`@@ -905,9 +916,9 @@ where`
`905`	`916`	`}`
`906`	`917`	`}`
`907`	`918`
`908`		`-impl<USART> fmt::Write for Tx<USART>`
	`919`	`+impl<USART, PINS> fmt::Write for Tx<USART, PINS>`
`909`	`920`	`where`
`910`		`- Tx<USART>: crate::hal::serial::Write<u8>,`
	`921`	`+ Tx<USART, PINS>: crate::hal::serial::Write<u8>,`
`911`	`922`	`{`
`912`	`923`	`fn write_str(&mut self, s: &str) -> fmt::Result {`
`913`	`924`	`let _ = s`