UART pins & RS485 (#109)

* UART pins & RS485 * format code * rename examples
stm32-rs · Jul 10, 2022 · fab9315 · fab9315
1 parent e91feef
commit fab9315
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Showing 7 changed files with 203 additions and 68 deletions.
diff --git a/examples/adc_ext_trig_double_dma_serial.rs b/examples/adc_ext_trig_double_dma_serial.rs
@@ -94,8 +94,9 @@ fn main() -> ! {
     let usart1 = dp
         .USART1
         .usart(
-            gpioa.pa9,                                                  // TX: pa9, => CN3 Pin-D5
-            gpioa.pa10,                                                 // RX: pa10, => CN3 Pin-D4
+            // TX: pa9, => CN3 Pin-D5
+            // RX: pa10, => CN3 Pin-D4
+            (gpioa.pa9, gpioa.pa10),
             FullConfig::default().baudrate(460800.bps()).fifo_enable(), // enable fifo, so that dma can fill it fast, otherwise it may not finish before ch1 is requested again
             &mut rcc,
         )

diff --git a/examples/sdcard.rs b/examples/sdcard.rs
@@ -35,8 +35,7 @@ fn main() -> ! {
     let mut uart = dp
         .USART2
         .usart(
-            gpioa.pa2,
-            gpioa.pa3,
+            (gpioa.pa2, gpioa.pa3),
             serial::FullConfig::default(),
             &mut rcc,
         )

diff --git a/examples/uart.rs b/examples/uart.rs
@@ -23,7 +23,7 @@ fn main() -> ! {
     let gpioa = dp.GPIOA.split(&mut rcc);
     let mut usart = dp
         .USART2
-        .usart(gpioa.pa2, gpioa.pa3, FullConfig::default(), &mut rcc)
+        .usart((gpioa.pa2, gpioa.pa3), FullConfig::default(), &mut rcc)
         .unwrap();
 
     writeln!(usart, "Hello\r").unwrap();

diff --git a/examples/uart-dma.rs → examples/uart_dma.rs b/examples/uart-dma.rs → examples/uart_dma.rs
@@ -25,8 +25,7 @@ fn main() -> ! {
     let mut usart1 = dp
         .USART1
         .usart(
-            gpioa.pa9,
-            gpioa.pa10,
+            (gpioa.pa9, gpioa.pa10),
             FullConfig::default().baudrate(115200.bps()),
             &mut rcc,
         )

diff --git a/examples/uart-fifo.rs → examples/uart_fifo.rs b/examples/uart-fifo.rs → examples/uart_fifo.rs
@@ -23,8 +23,7 @@ fn main() -> ! {
     let mut usart1 = dp
         .USART1
         .usart(
-            gpioa.pa9,
-            gpioa.pa10,
+            (gpioa.pa9, gpioa.pa10),
             FullConfig::default()
                 .baudrate(115200.bps())
                 .fifo_enable()

diff --git a/examples/uart_rs485.rs b/examples/uart_rs485.rs
@@ -0,0 +1,41 @@
+#![deny(warnings)]
+#![deny(unsafe_code)]
+#![no_main]
+#![no_std]
+
+extern crate cortex_m;
+extern crate cortex_m_rt as rt;
+extern crate panic_halt;
+extern crate stm32g0xx_hal as hal;
+
+use core::fmt::Write;
+
+use hal::prelude::*;
+use hal::serial::FullConfig;
+use hal::stm32;
+use nb::block;
+use rt::entry;
+
+#[entry]
+fn main() -> ! {
+    let dp = stm32::Peripherals::take().expect("cannot take peripherals");
+    let mut rcc = dp.RCC.constrain();
+    let gpioa = dp.GPIOA.split(&mut rcc);
+    let mut usart = dp
+        .USART2
+        .usart(
+            (gpioa.pa2, gpioa.pa3, gpioa.pa1),
+            FullConfig::default(),
+            &mut rcc,
+        )
+        .unwrap();
+
+    writeln!(usart, "Hello RS485\r").unwrap();
+
+    let mut cnt = 0;
+    loop {
+        let byte = block!(usart.read()).unwrap();
+        writeln!(usart, "{}: {}\r", cnt, byte).unwrap();
+        cnt += 1;
+    }
+}