Skip to content

Commit 26610c6

Browse files
Change default Sampletime to T_1
This is the reset value of the ADC. Now when running the example it is possible to get values other than 0 and 4095 by pressing the user button shortly.
1 parent ff7a430 commit 26610c6

File tree

1 file changed

+3
-3
lines changed

1 file changed

+3
-3
lines changed

src/adc.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -45,8 +45,6 @@ pub struct Adc<ADC> {
4545
/// There is always an overhead of 13 ADC clock cycles.
4646
/// E.g. For Sampletime T_19 the total conversion time (in ADC clock cycles) is
4747
/// 13 + 19 = 32 ADC Clock Cycles
48-
// TODO: there are boundaries on how this can be set depending on the hardware.
49-
// Check them and implement a sample time setting mechanism.
5048
pub enum SampleTime {
5149
T_1,
5250
T_2,
@@ -59,8 +57,9 @@ pub enum SampleTime {
5957
}
6058

6159
impl Default for SampleTime {
60+
/// T_1 is also the reset value.
6261
fn default() -> Self {
63-
SampleTime::T_19
62+
SampleTime::T_1
6463
}
6564
}
6665

@@ -426,6 +425,7 @@ macro_rules! adc_hal {
426425
}
427426

428427
/// Note: only allowed when ADSTART = 0
428+
// TODO: there are boundaries on how this can be set depending on the hardware.
429429
fn set_chan_smps(&self, chan: u8, smp: SampleTime) {
430430
match chan {
431431
1 => self.rb.smpr1.modify(|_, w| w.smp1().bits(smp.bitcode())),

0 commit comments

Comments
 (0)