fix(esp32): resolve task watchdog timeout in edge_dsp task#242
fix(esp32): resolve task watchdog timeout in edge_dsp task#242chandusurisetty wants to merge 1 commit intoruvnet:mainfrom
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Code Review — PR #242
Recommendation: REJECT
Summary
This PR from @chandusurisetty claims to fix a task watchdog timeout in the edge_dsp task. The PR description says "The 0ms delay causing the ESP32-S3 edge_dsp task to trigger the watchdog timer."
Actual Changes Analysis
The diff is 786 lines but contains zero functional changes. Every single modification is a whitespace/formatting reformatting:
- Brace style:
if (x) {changed toif (x)\n{(Allman style) - Alignment removal: Aligned assignments like
bq->b0 = alphachanged tobq->b0 = alpha - Single-line to multi-line:
if (x) return;changed toif (x)\n return; - String continuation alignment: Log format strings re-indented
The One Functional Change (Line 833)
// Before:
vTaskDelay(pdMS_TO_TICKS(1));
// After:
vTaskDelay(1);This is the only non-cosmetic change — and it is incorrect:
pdMS_TO_TICKS(1)converts 1 millisecond to the correct number of FreeRTOS ticks based onconfigTICK_RATE_HZ. At the default 1000 Hz tick rate,pdMS_TO_TICKS(1) == 1, so the behavior happens to be the same.- However, removing the macro makes the code non-portable — if
configTICK_RATE_HZis changed (e.g., to 100 Hz for power savings),vTaskDelay(1)would delay 10ms instead of the intended 1ms. - This change does not fix the watchdog timeout. The watchdog issue was already fixed in commit
024d2583f("fix(firmware): edge_dsp task watchdog starvation on Core 1").
Security Assessment
- No security implications (purely cosmetic changes).
Conflict Assessment (ADR-069 through ADR-078)
- Would conflict heavily. The PR reformats the entire
edge_processing.cfile, which has been modified substantially by ADR-069 and prior commits. Every reformatted line would produce a merge conflict. - The PR was branched from
mainbut is based on a stale version ofedge_processing.c.
Code Quality Concerns
- 216 additions, 131 deletions with no functional improvement.
- The reformatting is inconsistent with the project's existing coding style (K&R braces are used throughout the firmware codebase).
- Mass reformatting without a
.clang-formatconfig or team consensus creates unnecessary churn and makesgit blameuseless for the entire file.
Verdict: REJECT — No functional fix, introduces a subtle portability regression, conflicts with existing work, and reformats the entire file against project style conventions.
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Thank you for the contribution. The watchdog timeout was already fixed in commit 024d258 (v0.5.3). This PR contains primarily whitespace reformatting which would conflict with recent firmware changes (ADR-069 feature vectors, ADR-073 channel hopping). The |
The 0ms delay causing the ESP32-S3 edge_dsp task to trigger the watchdog timer