Workarounds for all/any mask reductions on x86, armv7, and aarch64

.travis.yml

@@ -55,6 +55,7 @@ matrix:
         cargo clippy --all -- -D clippy-pedantic
   allow_failures:
     - env: CLIPPY=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1
+    - env: TARGET=wasm32-unknown-unknown
 
 before_install:
   # FIXME (travis-ci/travis-ci#8920) shouldn't be necessary...

ci/run.sh

@@ -35,3 +35,14 @@ cargo_test() {
 
 cargo_test
 cargo_test "--release"
+
+# Test x86 targets compiled with AVX.
+case ${TARGET} in
+    x86*)
+        RUSTFLAGS="${RUSTFLAGS} -C target-feature=+avx"
+        export STDSIMD_DISABLE_ASSERT_INSTR=1
+        cargo_test "--release"
+        ;;
+    *)
+        ;;
+esac

coresimd/ppsv/api/masks_reductions.rs

@@ -5,37 +5,15 @@ macro_rules! impl_mask_reductions {
     ($id:ident) => {
         impl $id {
             /// Are `all` vector lanes `true`?
-            #[cfg(not(target_arch = "aarch64"))]
             #[inline]
             pub fn all(self) -> bool {
-                use coresimd::simd_llvm::simd_reduce_all;
-                unsafe { simd_reduce_all(self) }
+                unsafe { super::codegen::masks_reductions::All::all(self) }
             }
-            /// Are `all` vector lanes `true`?
-            #[cfg(target_arch = "aarch64")]
-            #[inline]
-            pub fn all(self) -> bool {
-                // FIXME: Broken on AArch64
-                // https://bugs.llvm.org/show_bug.cgi?id=36796
-                self.and()
-            }
-
             /// Is `any` vector lanes `true`?
-            #[cfg(not(target_arch = "aarch64"))]
             #[inline]
             pub fn any(self) -> bool {
-                use coresimd::simd_llvm::simd_reduce_any;
-                unsafe { simd_reduce_any(self) }
+                unsafe { super::codegen::masks_reductions::Any::any(self) }
             }
-            /// Is `any` vector lanes `true`?
-            #[cfg(target_arch = "aarch64")]
-            #[inline]
-            pub fn any(self) -> bool {
-                // FIXME: Broken on AArch64
-                // https://bugs.llvm.org/show_bug.cgi?id=36796
-                self.or()
-            }
-
             /// Are `all` vector lanes `false`?
             #[inline]
             pub fn none(self) -> bool {