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2 changes: 2 additions & 0 deletions compiler/rustc_borrowck/messages.ftl
Original file line number Diff line number Diff line change
Expand Up @@ -166,6 +166,8 @@ borrowck_returned_lifetime_wrong =
borrowck_returned_ref_escaped =
returns a reference to a captured variable which escapes the closure body

borrowck_simd_shuffle_last_const = last argument of `simd_shuffle` is required to be a `const` item

borrowck_suggest_create_freash_reborrow =
consider reborrowing the `Pin` instead of moving it

Expand Down
7 changes: 7 additions & 0 deletions compiler/rustc_borrowck/src/session_diagnostics.rs
Original file line number Diff line number Diff line change
Expand Up @@ -452,3 +452,10 @@ pub(crate) enum TypeNoCopy<'a, 'tcx> {
#[note(borrowck_ty_no_impl_copy)]
Note { is_partial_move: bool, ty: Ty<'tcx>, place: &'a str },
}

#[derive(Diagnostic)]
#[diag(borrowck_simd_shuffle_last_const)]
pub(crate) struct SimdShuffleLastConst {
#[primary_span]
pub span: Span,
}
29 changes: 20 additions & 9 deletions compiler/rustc_borrowck/src/type_check/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@ use rustc_mir_dataflow::impls::MaybeInitializedPlaces;
use rustc_mir_dataflow::move_paths::MoveData;
use rustc_mir_dataflow::ResultsCursor;

use crate::session_diagnostics::MoveUnsized;
use crate::session_diagnostics::{MoveUnsized, SimdShuffleLastConst};
use crate::{
borrow_set::BorrowSet,
constraints::{OutlivesConstraint, OutlivesConstraintSet},
Expand Down Expand Up @@ -1426,7 +1426,7 @@ impl<'a, 'tcx> TypeChecker<'a, 'tcx> {
.add_element(region_vid, term_location);
}

self.check_call_inputs(body, term, &sig, args, term_location, *call_source);
self.check_call_inputs(body, term, func, &sig, args, term_location, *call_source);
}
TerminatorKind::Assert { cond, msg, .. } => {
self.check_operand(cond, term_location);
Expand Down Expand Up @@ -1546,33 +1546,44 @@ impl<'a, 'tcx> TypeChecker<'a, 'tcx> {
}
}

#[instrument(level = "debug", skip(self, body, term, func, term_location, call_source))]
fn check_call_inputs(
&mut self,
body: &Body<'tcx>,
term: &Terminator<'tcx>,
func: &Operand<'tcx>,
sig: &ty::FnSig<'tcx>,
args: &[Operand<'tcx>],
term_location: Location,
call_source: CallSource,
) {
debug!("check_call_inputs({:?}, {:?})", sig, args);
if args.len() < sig.inputs().len() || (args.len() > sig.inputs().len() && !sig.c_variadic) {
span_mirbug!(self, term, "call to {:?} with wrong # of args", sig);
}

let func_ty = if let TerminatorKind::Call { func, .. } = &term.kind {
Some(func.ty(body, self.infcx.tcx))
} else {
None
};
let func_ty = func.ty(body, self.infcx.tcx);
if let ty::FnDef(def_id, _) = *func_ty.kind() {
if self.tcx().is_intrinsic(def_id) {
match self.tcx().item_name(def_id) {
sym::simd_shuffle => {
if !matches!(args[2], Operand::Constant(_)) {
self.tcx()
.sess
.emit_err(SimdShuffleLastConst { span: term.source_info.span });
}
}
_ => {}
}
}
}
debug!(?func_ty);

for (n, (fn_arg, op_arg)) in iter::zip(sig.inputs(), args).enumerate() {
let op_arg_ty = op_arg.ty(body, self.tcx());

let op_arg_ty = self.normalize(op_arg_ty, term_location);
let category = if call_source.from_hir_call() {
ConstraintCategory::CallArgument(self.infcx.tcx.erase_regions(func_ty))
ConstraintCategory::CallArgument(Some(self.infcx.tcx.erase_regions(func_ty)))
} else {
ConstraintCategory::Boring
};
Expand Down
4 changes: 2 additions & 2 deletions compiler/rustc_infer/src/infer/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -764,13 +764,13 @@ impl<'tcx> InferCtxt<'tcx> {
.collect();
vars.extend(
(0..inner.int_unification_table().len())
.map(|i| ty::IntVid { index: i as u32 })
.map(|i| ty::IntVid::from_u32(i as u32))
.filter(|&vid| inner.int_unification_table().probe_value(vid).is_none())
.map(|v| Ty::new_int_var(self.tcx, v)),
);
vars.extend(
(0..inner.float_unification_table().len())
.map(|i| ty::FloatVid { index: i as u32 })
.map(|i| ty::FloatVid::from_u32(i as u32))
.filter(|&vid| inner.float_unification_table().probe_value(vid).is_none())
.map(|v| Ty::new_float_var(self.tcx, v)),
);
Expand Down
19 changes: 8 additions & 11 deletions compiler/rustc_middle/src/ty/print/pretty.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1239,21 +1239,18 @@ pub trait PrettyPrinter<'tcx>:
.generics_of(principal.def_id)
.own_args_no_defaults(cx.tcx(), principal.args);

let mut projections = predicates.projection_bounds();

let mut args = args.iter().cloned();
let arg0 = args.next();
let projection0 = projections.next();
if arg0.is_some() || projection0.is_some() {
let args = arg0.into_iter().chain(args);
let projections = projection0.into_iter().chain(projections);
let mut projections: Vec<_> = predicates.projection_bounds().collect();
projections.sort_by_cached_key(|proj| {
cx.tcx().item_name(proj.item_def_id()).to_string()
});

if !args.is_empty() || !projections.is_empty() {
p!(generic_delimiters(|mut cx| {
cx = cx.comma_sep(args)?;
if arg0.is_some() && projection0.is_some() {
cx = cx.comma_sep(args.iter().copied())?;
if !args.is_empty() && !projections.is_empty() {
write!(cx, ", ")?;
}
cx.comma_sep(projections)
cx.comma_sep(projections.iter().copied())
}));
}
}
Expand Down
2 changes: 0 additions & 2 deletions compiler/rustc_mir_transform/messages.ftl
Original file line number Diff line number Diff line change
Expand Up @@ -42,8 +42,6 @@ mir_transform_requires_unsafe = {$details} is unsafe and requires unsafe {$op_in
}
.not_inherited = items do not inherit unsafety from separate enclosing items

mir_transform_simd_shuffle_last_const = last argument of `simd_shuffle` is required to be a `const` item

mir_transform_target_feature_call_label = call to function with `#[target_feature]`
mir_transform_target_feature_call_note = can only be called if the required target features are available

Expand Down
7 changes: 0 additions & 7 deletions compiler/rustc_mir_transform/src/errors.rs
Original file line number Diff line number Diff line change
Expand Up @@ -258,10 +258,3 @@ pub(crate) struct MustNotSuspendReason {
pub span: Span,
pub reason: String,
}

#[derive(Diagnostic)]
#[diag(mir_transform_simd_shuffle_last_const)]
pub(crate) struct SimdShuffleLastConst {
#[primary_span]
pub span: Span,
}
12 changes: 1 addition & 11 deletions compiler/rustc_mir_transform/src/lower_intrinsics.rs
Original file line number Diff line number Diff line change
@@ -1,11 +1,10 @@
//! Lowers intrinsic calls

use crate::{errors, MirPass};
use crate::MirPass;
use rustc_middle::mir::*;
use rustc_middle::ty::GenericArgsRef;
use rustc_middle::ty::{self, Ty, TyCtxt};
use rustc_span::symbol::{sym, Symbol};
use rustc_span::Span;
use rustc_target::abi::{FieldIdx, VariantIdx};

pub struct LowerIntrinsics;
Expand Down Expand Up @@ -304,9 +303,6 @@ impl<'tcx> MirPass<'tcx> for LowerIntrinsics {
terminator.kind = TerminatorKind::Unreachable;
}
}
sym::simd_shuffle => {
validate_simd_shuffle(tcx, args, terminator.source_info.span);
}
_ => {}
}
}
Expand All @@ -325,9 +321,3 @@ fn resolve_rust_intrinsic<'tcx>(
}
None
}

fn validate_simd_shuffle<'tcx>(tcx: TyCtxt<'tcx>, args: &[Operand<'tcx>], span: Span) {
if !matches!(args[2], Operand::Constant(_)) {
tcx.sess.emit_err(errors::SimdShuffleLastConst { span });
}
}
7 changes: 4 additions & 3 deletions compiler/rustc_privacy/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1463,14 +1463,15 @@ impl SearchInterfaceForPrivateItemsVisitor<'_> {
};

let vis = self.tcx.local_visibility(local_def_id);
let hir_id = self.tcx.hir().local_def_id_to_hir_id(local_def_id);
let span = self.tcx.def_span(self.item_def_id.to_def_id());
let vis_span = self.tcx.def_span(def_id);
if self.in_assoc_ty && !vis.is_at_least(self.required_visibility, self.tcx) {
let vis_descr = match vis {
ty::Visibility::Public => "public",
ty::Visibility::Restricted(vis_def_id) => {
if vis_def_id == self.tcx.parent_module(hir_id).to_local_def_id() {
if vis_def_id
== self.tcx.parent_module_from_def_id(local_def_id).to_local_def_id()
{
"private"
} else if vis_def_id.is_top_level_module() {
"crate-private"
Expand Down Expand Up @@ -1504,7 +1505,7 @@ impl SearchInterfaceForPrivateItemsVisitor<'_> {
};
self.tcx.emit_spanned_lint(
lint,
hir_id,
self.tcx.hir().local_def_id_to_hir_id(self.item_def_id),
span,
PrivateInterfacesOrBoundsLint {
item_span: span,
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -838,7 +838,20 @@ impl<'tcx> TypeErrCtxtExt<'tcx> for TypeErrCtxt<'_, 'tcx> {
obligation.param_env,
real_trait_pred_and_base_ty,
);
if self.predicate_may_hold(&obligation) {
let sized_obligation = Obligation::new(
self.tcx,
obligation.cause.clone(),
obligation.param_env,
ty::TraitRef::from_lang_item(
self.tcx,
hir::LangItem::Sized,
obligation.cause.span,
[base_ty],
),
);
if self.predicate_may_hold(&obligation)
&& self.predicate_must_hold_modulo_regions(&sized_obligation)
{
let call_node = self.tcx.hir().get(*call_hir_id);
let msg = "consider dereferencing here";
let is_receiver = matches!(
Expand Down
36 changes: 12 additions & 24 deletions compiler/rustc_type_ir/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -574,16 +574,16 @@ rustc_index::newtype_index! {
pub struct TyVid {}
}

/// An **int**egral (`u32`, `i32`, `usize`, etc.) type **v**ariable **ID**.
#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Hash, Encodable, Decodable)]
pub struct IntVid {
pub index: u32,
rustc_index::newtype_index! {
/// An **int**egral (`u32`, `i32`, `usize`, etc.) type **v**ariable **ID**.
#[debug_format = "?{}i"]
pub struct IntVid {}
}

/// An **float**ing-point (`f32` or `f64`) type **v**ariable **ID**.
#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Hash, Encodable, Decodable)]
pub struct FloatVid {
pub index: u32,
rustc_index::newtype_index! {
/// A **float**ing-point (`f32` or `f64`) type **v**ariable **ID**.
#[debug_format = "?{}f"]
pub struct FloatVid {}
}

/// A placeholder for a type that hasn't been inferred yet.
Expand Down Expand Up @@ -645,11 +645,11 @@ impl UnifyKey for IntVid {
type Value = Option<IntVarValue>;
#[inline] // make this function eligible for inlining - it is quite hot.
fn index(&self) -> u32 {
self.index
self.as_u32()
}
#[inline]
fn from_index(i: u32) -> IntVid {
IntVid { index: i }
IntVid::from_u32(i)
}
fn tag() -> &'static str {
"IntVid"
Expand All @@ -662,11 +662,11 @@ impl UnifyKey for FloatVid {
type Value = Option<FloatVarValue>;
#[inline]
fn index(&self) -> u32 {
self.index
self.as_u32()
}
#[inline]
fn from_index(i: u32) -> FloatVid {
FloatVid { index: i }
FloatVid::from_u32(i)
}
fn tag() -> &'static str {
"FloatVid"
Expand Down Expand Up @@ -770,18 +770,6 @@ impl fmt::Debug for FloatVarValue {
}
}

impl fmt::Debug for IntVid {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
write!(f, "?{}i", self.index)
}
}

impl fmt::Debug for FloatVid {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
write!(f, "?{}f", self.index)
}
}

impl fmt::Debug for Variance {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
f.write_str(match *self {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ bin="$PWD/clang+llvm-16.0.4-x86_64-linux-gnu-ubuntu-22.04/bin"
git clone https://github.com/WebAssembly/wasi-libc

cd wasi-libc
git reset --hard 7018e24d8fe248596819d2e884761676f3542a04
git reset --hard ec4566beae84e54952637f0bf61bee4b4cacc087
make -j$(nproc) \
CC="$bin/clang" \
NM="$bin/llvm-nm" \
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ bin="$PWD/clang+llvm-16.0.4-x86_64-linux-gnu-ubuntu-22.04/bin"
git clone https://github.com/WebAssembly/wasi-libc

cd wasi-libc
git reset --hard 7018e24d8fe248596819d2e884761676f3542a04
git reset --hard ec4566beae84e54952637f0bf61bee4b4cacc087
make -j$(nproc) \
CC="$bin/clang" \
NM="$bin/llvm-nm" \
Expand Down
2 changes: 1 addition & 1 deletion src/doc/rustc/src/platform-support.md
Original file line number Diff line number Diff line change
Expand Up @@ -181,6 +181,7 @@ target | std | notes
`wasm32-unknown-emscripten` | ✓ | WebAssembly via Emscripten
`wasm32-unknown-unknown` | ✓ | WebAssembly
`wasm32-wasi` | ✓ | WebAssembly with WASI
[`wasm32-wasi-preview1-threads`](platform-support/wasm32-wasi-preview1-threads.md) | ✓ | | WebAssembly with WASI Preview 1 and threads
`x86_64-apple-ios` | ✓ | 64-bit x86 iOS
[`x86_64-fortanix-unknown-sgx`](platform-support/x86_64-fortanix-unknown-sgx.md) | ✓ | [Fortanix ABI] for 64-bit Intel SGX
`x86_64-fuchsia` | ✓ | Alias for `x86_64-unknown-fuchsia`
Expand Down Expand Up @@ -323,7 +324,6 @@ target | std | host | notes
`thumbv7a-pc-windows-msvc` | ? | |
`thumbv7a-uwp-windows-msvc` | ✓ | |
`thumbv7neon-unknown-linux-musleabihf` | ? | | Thumb2-mode ARMv7-A Linux with NEON, MUSL
[`wasm32-wasi-preview1-threads`](platform-support/wasm32-wasi-preview1-threads.md) | ✓ | | WebAssembly with WASI Preview 1 and threads
[`wasm64-unknown-unknown`](platform-support/wasm64-unknown-unknown.md) | ? | | WebAssembly
`x86_64-apple-ios-macabi` | ✓ | | Apple Catalyst on x86_64
[`x86_64-apple-tvos`](platform-support/apple-tvos.md) | ? | | x86 64-bit tvOS
Expand Down
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