Adding dissagg mode support to Qwen3Moe #682
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qcdipankar
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ochougul,
quic-amitraj,
quic-hemagnih and
quic-rishinr
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Signed-off-by: Dipankar Sarkar <[email protected]>
Signed-off-by: Dipankar Sarkar <[email protected]>
Signed-off-by: Dipankar Sarkar <[email protected]>
Signed-off-by: Dipankar Sarkar <[email protected]>
Signed-off-by: Dipankar Sarkar <[email protected]>
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Signed-off-by: Dipankar Sarkar <[email protected]>
Signed-off-by: Dipankar Sarkar <[email protected]>
ochougul
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Jan 7, 2026
Signed-off-by: Dipankar Sarkar <[email protected]>
Signed-off-by: Dipankar Sarkar <[email protected]>
Signed-off-by: Dipankar Sarkar <[email protected]>
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#672
Adding disagg support to Qwen3Moe
PL =128
CL=128*3