Model host power on the SP and provide a bridge - #13
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A1 and A0 are now answered by the sequencer FPGA. `gimlet_seq` can perform a boot-time A0 instead of failure with `UnrecognizedCPU` and an A2 reset. A new host power bridge will report state, A0/A2 transitions, ignition requests, accept host-lost, etc. This is managed by the `[host]` block in the config file. The good news is that with voxel, the SPs can now handle IPCC `RequestPowerOff` on UART7. SP resets will reset sleds, and the FPGAs will return to A2 as designed when host power cycles.
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A1 and A0 are now answered by the sequencer FPGA.
gimlet_seqcan perform a boot-time A0 instead of failure withUnrecognizedCPUand an A2 reset.A new host power bridge will report state, A0/A2 transitions, ignition requests, accept host-lost, etc. This is managed by the
[host]block in the config file.The good news is that with voxel, the SPs can now handle IPCC
RequestPowerOffon UART7. SP resets will reset sleds, and the FPGAs will return to A2 as designed when host power cycles.