8388926: RISC-V: Skip redundant zext.w in set_narrow_klass when bit 31 is clear#32038
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8388926: RISC-V: Skip redundant zext.w in set_narrow_klass when bit 31 is clear#32038zifeihan wants to merge 1 commit into
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Hi, please consider.
MacroAssembler::set_narrow_klass uses li32 (lui + addiw) to materialize a narrow klass constant into a register. Since addiw sign-extends the 32-bit result to 64 bits, the function previously emitted a zext.w unconditionally to clear the upper 32 bits. However, sign extension only corrupts the upper bits when bit 31 of the narrow klass value is set (i.e., (int32_t)nk < 0). When bit 31 is clear, addiw naturally produces a correctly zero-extended result, making zext.w redundant.
Correctness Testing
Assembly log verification
The command to print the Assembly log is as follows:
./java -XX:+UnlockDiagnosticVMOptions -XX:+PrintAssembly -XX:CompileCommand=compileonly,java.util.HashMap::putVal -version > assembly.logWe can observe that after the optimization, the instruction .insn 4, 0x080888bb has been successfully eliminated, this is a Zba extension instruction. After decoding, it is add.uw a7, a7, zero, which is equivalent to zext.w a7, a7
without this patch:
with this patch:
Performance Test:
specjbb2015 without this patch:
specjbb2015 witch this patch:
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<wangbingzhen.riscv@isrc.iscas.ac.cn>Reviewing
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gitCheckout this PR locally:
$ git fetch https://git.openjdk.org/jdk.git pull/32038/head:pull/32038$ git checkout pull/32038Update a local copy of the PR:
$ git checkout pull/32038$ git pull https://git.openjdk.org/jdk.git pull/32038/headUsing Skara CLI tools
Checkout this PR locally:
$ git pr checkout 32038View PR using the GUI difftool:
$ git pr show -t 32038Using diff file
Download this PR as a diff file:
https://git.openjdk.org/jdk/pull/32038.diff
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