8388837: RISC-V: Track card addresses directly in G1 array post-write barrier loop - #32020
8388837: RISC-V: Track card addresses directly in G1 array post-write barrier loop#32020zifeihan wants to merge 3 commits into
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albertnetymk
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Looks good.
(For consistency, could we increment start, as x86 does, instead of decrementing the end address?)
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/cc hotspot-gc |
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@albertnetymk |
@albertnetymk Thanks for your review, Fixed. |
| __ subi(count, count, 1); | ||
| __ bgez(count, loop); | ||
| __ addi(start, start, 1); | ||
| __ bge(count, start, loop); |
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Suggestion: __ ble(start, count, loop);
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Suggestion:
__ ble(start, count, loop);
Fixed
RealFYang
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Updated change looks fine to me. Thanks.
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Thanks all for the review. |
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Going to push as commit e8fdd54.
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@DingliZhang @zifeihan Pushed as commit e8fdd54. 💡 You may see a message that your pull request was closed with unmerged commits. This can be safely ignored. |
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As discussed here: #31956 (comment)
We can propose this array card-loop optimization and apply it on both RISC-V and AArch64. However, AArch64's indexed addressing may limit the performance benefit, so I need to run performance tests to verify it first. After that, I'll submit a new PR for AArch64.
For now, let's only apply the optimization to the RISC-V backend here.
Correctness Testing
Performance test:
We can observe the throughput scores increased from 604.565 to 616.446. While this may not look like a huge improvement, we can also use the perfnorm profiler to observe normalized metrics such as instructions per operation and cycles per operation. From the data below, we can see that after applying the patch,
instructions:udecreased — which is exactly our goal.Performance test command:
without this patch:
with this patch:
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