Merge branch 'master' into avoid-ub-on-course-segment

n64decomp · Aug 30, 2024 · 7b14cb2 · 7b14cb2
2 parents 7dfedc1 + 3534198
commit 7b14cb2
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diff --git a/.clang-format b/.clang-format
@@ -1,18 +1,23 @@
 IndentWidth: 4
 Language: Cpp
-AlignAfterOpenBracket: Align
-SortIncludes: false
-ColumnLimit: 104
-PointerAlignment: Right
-AllowShortFunctionsOnASingleLine: false
-AllowShortIfStatementsOnASingleLine: false
-BinPackArguments: true
-BinPackParameters: true
-SpaceAfterCStyleCast: true
+UseTab: Never
+ColumnLimit: 120
+PointerAlignment: Left
 BreakBeforeBraces: Attach
-BreakBeforeTernaryOperators: true
-BreakBeforeBinaryOperators: NonAssignment
+SpaceAfterCStyleCast: true
 Cpp11BracedListStyle: false
 IndentCaseLabels: true
+BinPackArguments: true
+BinPackParameters: true
+AlignAfterOpenBracket: Align
+AlignOperands: true
+BreakBeforeTernaryOperators: true
+BreakBeforeBinaryOperators: None
+AllowShortBlocksOnASingleLine: true
+AllowShortIfStatementsOnASingleLine: false
+AllowShortLoopsOnASingleLine: false
+AllowShortCaseLabelsOnASingleLine: false
+AllowShortFunctionsOnASingleLine: false
+AlignEscapedNewlines: Left
 AlignTrailingComments: true
-UseTab: Never
+SortIncludes: false
diff --git a/.clang-tidy b/.clang-tidy
@@ -1,6 +1,9 @@
----
-Checks: '-*,readability-braces-around-statements'
+Checks: '-*,readability-braces-around-statements,readability-inconsistent-declaration-parameter-name'
 WarningsAsErrors: ''
-HeaderFilterRegex: '(src|include|enhancements)\/.*\.h$'
+HeaderFilterRegex: '(src|include)\/.*\.h$'
 FormatStyle: 'file'
 CheckOptions:
+  # Require argument names to match exactly (instead of allowing a name to be a prefix/suffix of another)
+  # Note: 'true' is expected by clang-tidy 12+ but '1' is used for compatibility with older versions
+  - key: readability-inconsistent-declaration-parameter-name.Strict
+    value: 1
diff --git a/.github/workflows/clang-format.yml b/.github/workflows/clang-format.yml
@@ -0,0 +1,21 @@
+name: clang-format Check
+on: [push, pull_request]
+jobs:
+  formatting-check:
+    name: Formatting Check
+    runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        path:
+          - include
+          - data
+          - courses
+          - src
+    steps:
+      - uses: actions/checkout@v4
+      - name: Run clang-format style check for C/C++/Protobuf programs.
+        uses: jidicula/[email protected]
+        with:
+          clang-format-version: "18"
+          check-path: ${{ matrix.path }}
+          exclude-regex: "gbi.h"
diff --git a/.github/workflows/linux-compile.yml b/.github/workflows/linux-compile.yml
@@ -27,4 +27,4 @@ jobs:
           cp -r complementary_file/* .
           echo "${{ secrets.AES_KEY }}" | openssl enc -d -aes-256-cbc -pass stdin -pbkdf2 -in baserom.us.z64.aes -out baserom.us.z64
           make assets
-          make -j
+          make -j  || ./first-diff.py
diff --git a/Makefile b/Makefile
@@ -81,6 +81,7 @@ endif
 ifeq      ($(COMPILER),ido)
   MIPSISET := -mips2
 else ifeq ($(COMPILER),gcc)
+  DEFINES += AVOID_UB=1 NON_MATCHING=1
   NON_MATCHING := 1
   VERSION_ASFLAGS := --defsym AVOID_UB=1
   MIPSISET     := -mips3
@@ -433,6 +434,9 @@ doc:
 	@$(PRINT) "$(GREEN)Documentation generated in docs/html$(NO_COL)\n"
 	@$(PRINT) "$(GREEN)Results can be viewed by opening docs/html/index.html in a web browser$(NO_COL)\n"
 
+format:
+	@$(PYTHON) $(TOOLS_DIR)/format.py -j $(N_THREADS)
+
 clean:
 	$(RM) -r $(BUILD_DIR)
 
@@ -633,7 +637,7 @@ $(GLOBAL_ASM_RACING_O_FILES): CC := $(PYTHON) $(TOOLS_DIR)/asm_processor/build.p
 $(BUILD_DIR)/src/os/%.o:          OPT_FLAGS :=
 $(BUILD_DIR)/src/os/math/%.o:     OPT_FLAGS := -O2
 $(BUILD_DIR)/src/os/math/ll%.o:   OPT_FLAGS :=
-$(BUILD_DIR)/src/os/math/ll%.o:   MIPSISET := -mips3 -32
+$(BUILD_DIR)/src/os/math/ll%.o:   MIPSISET := -mips3
 $(BUILD_DIR)/src/os/ldiv.o:       OPT_FLAGS := -O2
 $(BUILD_DIR)/src/os/string.o:     OPT_FLAGS := -O2
 $(BUILD_DIR)/src/os/gu%.o:        OPT_FLAGS := -O3

diff --git a/README.md b/README.md
@@ -95,6 +95,7 @@ Documentation generated using [Doxygen](https://www.doxygen.nl/index.html). Run
 
 Pull requests are welcome. For major changes, please discuss in the Discord.
 
-Run `clang-format` on your code to ensure it meets the project's coding standards.
+Run `make format` to ensure it meets the project's coding standards.
+If code needs to avoid formatting place `// clang-format off` before the code and `// clang-format on` after.
 
 Official Discord: [discord.gg/DuYH3Fh](https://discord.gg/DuYH3Fh)
diff --git a/asm/boot.s b/asm/boot.s
@@ -19,8 +19,8 @@ glabel ipl3_entry # 0xA4000040
     mtc0  $zero, $13
     mtc0  $zero, $9
     mtc0  $zero, $11
-    lui   $t0, %hi(RI_MODE_REG)
-    addiu $t0, %lo(RI_MODE_REG)
+    lui   $t0, %hi(PHYS_TO_K1|RI_MODE_REG)
+    addiu $t0, %lo(PHYS_TO_K1|RI_MODE_REG)
     lw    $t1, 0xc($t0)
     bnez  $t1, .LA4000410
      nop
@@ -30,12 +30,12 @@ glabel ipl3_entry # 0xA4000040
     sw    $s5, 8($sp)
     sw    $s6, 0xc($sp)
     sw    $s7, 0x10($sp)
-    lui   $t0, %hi(RI_MODE_REG)
-    addiu $t0, %lo(RI_MODE_REG)
+    lui   $t0, %hi(PHYS_TO_K1|RI_MODE_REG)
+    addiu $t0, %lo(PHYS_TO_K1|RI_MODE_REG)
     lui   $t2, (0xa3f80000 >> 16)
     lui   $t3, (0xa3f00000 >> 16)
-    lui   $t4, %hi(MI_MODE_REG)
-    addiu $t4, %lo(MI_MODE_REG)
+    lui   $t4, %hi(PHYS_TO_K1|MI_MODE_REG)
+    addiu $t4, %lo(PHYS_TO_K1|MI_MODE_REG)
     ori   $t1, $zero, 64
     sw    $t1, 4($t0)
     li   $s1, 8000
@@ -81,8 +81,8 @@ glabel ipl3_entry # 0xA4000040
     lui   $s4, (0xA0000000 >> 16)
     addiu $sp, $sp, -0x48
     move  $fp, $sp
-    lui   $s0, %hi(MI_VERSION_REG)
-    lw    $s0, %lo(MI_VERSION_REG)($s0)
+    lui   $s0, %hi(PHYS_TO_K1|MI_VERSION_REG)
+    lw    $s0, %lo(PHYS_TO_K1|MI_VERSION_REG)($s0)
     lui   $s1, (0x01010101 >> 16)
     addiu $s1, (0x01010101 & 0xFFFF)
     bne   $s0, $s1, .LA4000160
@@ -232,13 +232,13 @@ glabel ipl3_entry # 0xA4000040
     slt   $t0, $v1, $t5
     bnez  $t0, .LA4000274
      nop
-    lui   $t2, %hi(RI_REFRESH_REG)
+    lui   $t2, %hi(PHYS_TO_K1|RI_REFRESH_REG)
     sll   $s2, $s2, 0x13
     lui   $t1, (0x00063634 >> 16)
     ori   $t1, (0x00063634 & 0xFFFF)
     or    $t1, $t1, $s2
-    sw    $t1, %lo(RI_REFRESH_REG)($t2)
-    lw    $t1, %lo(RI_REFRESH_REG)($t2)
+    sw    $t1, %lo(PHYS_TO_K1|RI_REFRESH_REG)($t2)
+    lw    $t1, %lo(PHYS_TO_K1|RI_REFRESH_REG)($t2)
     lui   $t0, (0xA0000300 >> 16)
     ori   $t0, (0xA0000300 & 0xFFFF)
     lui   $t1, (0x0FFFFFFF >> 16)
@@ -328,24 +328,24 @@ glabel ipl3_entry # 0xA4000040
     lw    $t1, %lo(D_B0000008)($t3)
     lui   $t2, (0x1FFFFFFF >> 16)
     ori   $t2, (0x1FFFFFFF & 0xFFFF)
-    lui   $at, %hi(PI_DRAM_ADDR_REG)
+    lui   $at, %hi(PHYS_TO_K1|PI_DRAM_ADDR_REG)
     and   $t1, $t1, $t2
-    sw    $t1, %lo(PI_DRAM_ADDR_REG)($at)
-    lui   $t0, %hi(PI_STATUS_REG)
+    sw    $t1, %lo(PHYS_TO_K1|PI_DRAM_ADDR_REG)($at)
+    lui   $t0, %hi(PHYS_TO_K1|PI_STATUS_REG)
 .LA40004D0:
-    lw    $t0, %lo(PI_STATUS_REG)($t0)
+    lw    $t0, %lo(PHYS_TO_K1|PI_STATUS_REG)($t0)
     andi  $t0, $t0, 2
     bnezl $t0, .LA40004D0
-     lui   $t0, %hi(PI_STATUS_REG)
+     lui   $t0, %hi(PHYS_TO_K1|PI_STATUS_REG)
     li    $t0, 0x1000
     add   $t0, $t0, $t3
     and   $t0, $t0, $t2
-    lui   $at, %hi(PI_CART_ADDR_REG)
-    sw    $t0, %lo(PI_CART_ADDR_REG)($at)
+    lui   $at, %hi(PHYS_TO_K1|PI_CART_ADDR_REG)
+    sw    $t0, %lo(PHYS_TO_K1|PI_CART_ADDR_REG)($at)
     lui   $t2, 0x0010
     addiu $t2, 0xFFFF
-    lui   $at, %hi(PI_WR_LEN_REG)
-    sw    $t2, %lo(PI_WR_LEN_REG)($at)
+    lui   $at, %hi(PHYS_TO_K1|PI_WR_LEN_REG)
+    sw    $t2, %lo(PHYS_TO_K1|PI_WR_LEN_REG)($at)
 
 .LA4000514:
     nop
@@ -376,8 +376,8 @@ glabel ipl3_entry # 0xA4000040
     nop
     nop
     nop
-    lui   $t3, %hi(PI_STATUS_REG)
-    lw    $t3, %lo(PI_STATUS_REG)($t3)
+    lui   $t3, %hi(PHYS_TO_K1|PI_STATUS_REG)
+    lw    $t3, %lo(PHYS_TO_K1|PI_STATUS_REG)($t3)
     andi  $t3, $t3, 0x1
     bnez  $t3, .LA4000514
      nop
@@ -451,37 +451,37 @@ halt: # checksum fail
      nop
 
 func_A4000690:
-    lui   $t1, %hi(SP_PC)
-    lw    $t1, %lo(SP_PC)($t1)
+    lui   $t1, %hi(PHYS_TO_K1|SP_PC_REG)
+    lw    $t1, %lo(PHYS_TO_K1|SP_PC_REG)($t1)
     lw    $s0, 0x14($sp)
     lw    $ra, 0x1c($sp)
     beqz  $t1, .LA40006BC
      addiu $sp, $sp, 0x20
     li    $t2, 65
-    lui   $at, %hi(SP_STATUS_REG)
-    sw    $t2, %lo(SP_STATUS_REG)($at)
-    lui   $at, %hi(SP_PC)
-    sw    $zero, %lo(SP_PC)($at)
+    lui   $at, %hi(PHYS_TO_K1|SP_STATUS_REG)
+    sw    $t2, %lo(PHYS_TO_K1|SP_STATUS_REG)($at)
+    lui   $at, %hi(PHYS_TO_K1|SP_PC_REG)
+    sw    $zero, %lo(PHYS_TO_K1|SP_PC_REG)($at)
 .LA40006BC:
     lui   $t3, (0x00AAAAAE >> 16)
     ori   $t3, (0x00AAAAAE & 0xFFFF)
-    lui   $at, %hi(SP_STATUS_REG)
-    sw    $t3, %lo(SP_STATUS_REG)($at)
-    lui   $at, %hi(MI_INTR_MASK_REG)
+    lui   $at, %hi(PHYS_TO_K1|SP_STATUS_REG)
+    sw    $t3, %lo(PHYS_TO_K1|SP_STATUS_REG)($at)
+    lui   $at, %hi(PHYS_TO_K1|MI_INTR_MASK_REG)
     li    $t0, 1365
-    sw    $t0, %lo(MI_INTR_MASK_REG)($at)
-    lui   $at, %hi(SI_STATUS_REG)
-    sw    $zero, %lo(SI_STATUS_REG)($at)
-    lui   $at, %hi(AI_STATUS_REG)
-    sw    $zero, %lo(AI_STATUS_REG)($at)
-    lui   $at, %hi(MI_MODE_REG)
+    sw    $t0, %lo(PHYS_TO_K1|MI_INTR_MASK_REG)($at)
+    lui   $at, %hi(PHYS_TO_K1|SI_STATUS_REG)
+    sw    $zero, %lo(PHYS_TO_K1|SI_STATUS_REG)($at)
+    lui   $at, %hi(PHYS_TO_K1|AI_STATUS_REG)
+    sw    $zero, %lo(PHYS_TO_K1|AI_STATUS_REG)($at)
+    lui   $at, %hi(PHYS_TO_K1|MI_MODE_REG)
     li    $t1, 2048
-    sw    $t1, %lo(MI_MODE_REG)($at)
+    sw    $t1, %lo(PHYS_TO_K1|MI_MODE_REG)($at)
     li    $t1, 2
-    lui   $at, %hi(PI_STATUS_REG)
+    lui   $at, %hi(PHYS_TO_K1|PI_STATUS_REG)
     lui   $t0, (0xA0000300 >> 16)
     ori   $t0, (0xA0000300 & 0xFFFF)
-    sw    $t1, %lo(PI_STATUS_REG)($at)
+    sw    $t1, %lo(PHYS_TO_K1|PI_STATUS_REG)($at)
     sw    $s7, 0x14($t0)
     sw    $s5, 0xc($t0)
     sw    $s3, 0x4($t0)
@@ -747,8 +747,8 @@ func_A4000A40:
     li    $k1, 1
     bne   $a1, $k1, .LA4000AC0
      sw    $t7, ($s5)
-    lui   $k0, %hi(MI_MODE_REG)
-    sw    $zero, %lo(MI_MODE_REG)($k0)
+    lui   $k0, %hi(PHYS_TO_K1|MI_MODE_REG)
+    sw    $zero, %lo(PHYS_TO_K1|MI_MODE_REG)($k0)
 .LA4000AC0:
     lw    $ra, 0x1c($sp)
     addiu $sp, $sp, 0x28
@@ -759,12 +759,12 @@ func_A4000AD0:
     addiu $sp, $sp, -0x28
     sw    $ra, 0x1c($sp)
     li    $k0, 0x2000
-    lui   $k1, %hi(MI_MODE_REG)
-    sw    $k0, %lo(MI_MODE_REG)($k1)
+    lui   $k1, %hi(PHYS_TO_K1|MI_MODE_REG)
+    sw    $k0, %lo(PHYS_TO_K1|MI_MODE_REG)($k1)
     move  $fp, $zero
     lw    $fp, ($s5)
     li    $k0, 0x1000
-    sw    $k0, %lo(MI_MODE_REG)($k1)
+    sw    $k0, %lo(PHYS_TO_K1|MI_MODE_REG)($k1)
     li    $k1, 0x40
     and   $k1, $k1, $fp
     srl   $k1, $k1, 6

diff --git a/asm/eu_nonmatchings/audio_init.s b/asm/eu_nonmatchings/audio_init.s
@@ -18,7 +18,7 @@ glabel audio_init
 /* BCD08 800BC108 3C04800F */  lui        $a0, %hi(gAudioHeapSize)
 /* BCD0C 800BC10C 8C84A710 */  lw         $a0, %lo(gAudioHeapSize)($a0)
 /* BCD10 800BC110 00001825 */  or         $v1, $zero, $zero
-/* BCD14 800BC114 3C0A803B */  lui        $t2, %hi(D_803B71A0)
+/* BCD14 800BC114 3C0A803B */  lui        $t2, %hi(gAudioGlobalsEndMarker)
 /* BCD18 800BC118 04810003 */  bgez       $a0, .L800BC128
 /* BCD1C 800BC11C 000478C3 */   sra       $t7, $a0, 3
 /* BCD20 800BC120 24810007 */  addiu      $at, $a0, 0x7
@@ -40,7 +40,7 @@ glabel audio_init
 /* BCD58 800BC158 AC48FFF8 */   sw        $t0, -0x8($v0)
 .L800BC15C:
 /* BCD5C 800BC15C 2482F780 */  addiu      $v0, $a0, %lo(gGfxSPTaskOutputBufferSize)
-/* BCD60 800BC160 254A71A0 */  addiu      $t2, $t2, %lo(D_803B71A0)
+/* BCD60 800BC160 254A71A0 */  addiu      $t2, $t2, %lo(gAudioGlobalsEndMarker)
 /* BCD64 800BC164 01421823 */  subu       $v1, $t2, $v0
 /* BCD68 800BC168 000380C2 */  srl        $s0, $v1, 3
 /* BCD6C 800BC16C 06000008 */  bltz       $s0, .L800BC190

diff --git a/asm/non_matchings/audio/load/audio_init.s b/asm/non_matchings/audio/load/audio_init.s
@@ -26,7 +26,7 @@ glabel audio_init
 /* 0BCD08 800BC108 3C04800F */  lui   $a0, %hi(gAudioHeapSize) # $a0, 0x800f
 /* 0BCD0C 800BC10C 8C84A5D0 */  lw    $a0, %lo(gAudioHeapSize)($a0)
 /* 0BCD10 800BC110 00001825 */  move  $v1, $zero
-/* 0BCD14 800BC114 3C0A803B */  lui   $t2, %hi(D_803B71A0) # $t2, 0x803b
+/* 0BCD14 800BC114 3C0A803B */  lui   $t2, %hi(gAudioGlobalsEndMarker) # $t2, 0x803b
 /* 0BCD18 800BC118 04810003 */  bgez  $a0, .L800BC128
 /* 0BCD1C 800BC11C 000478C3 */   sra   $t7, $a0, 3
 /* 0BCD20 800BC120 24810007 */  addiu $at, $a0, 7
@@ -48,7 +48,7 @@ glabel audio_init
 /* 0BCD58 800BC158 AC48FFF8 */   sw    $t0, -8($v0)
 .L800BC15C:
 /* 0BCD5C 800BC15C 2482F780 */  addiu $v0, $a0, %lo(gGfxSPTaskOutputBufferSize) # -0x880
-/* 0BCD60 800BC160 254A71A0 */  addiu $t2, %lo(D_803B71A0) # addiu $t2, $t2, 0x71a0
+/* 0BCD60 800BC160 254A71A0 */  addiu $t2, %lo(gAudioGlobalsEndMarker) # addiu $t2, $t2, 0x71a0
 /* 0BCD64 800BC164 01421823 */  subu  $v1, $t2, $v0
 /* 0BCD68 800BC168 000380C2 */  srl   $s0, $v1, 3
 /* 0BCD6C 800BC16C 06000007 */  bltz  $s0, .L800BC18C

diff --git a/asm/os/__osDisableInt.s b/asm/os/__osDisableInt.s
@@ -8,10 +8,10 @@
 
 
 glabel __osDisableInt
-  mfc0  $t0, $12
-  and   $t1, $t0, -2
-  mtc0  $t1, $12
-  andi  $v0, $t0, 1
+  mfc0  $t0, C0_SR
+  and   $t1, $t0, ~SR_IE
+  mtc0  $t1, C0_SR
+  andi  $v0, $t0, SR_IE
   nop
   jr    $ra
    nop