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heathzenith/h89.cpp: Update memory map to directly use decoder PROMs #13363

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heathzenith/h89.cpp: Update memory map to directly use decoder PROMs #13363

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b9bee01
heathzenith/h89.cpp: Update memory map to directly use decoder PROMs
mgarlanger Feb 13, 2025
a1abf70
minor cleanup and consistency update
mgarlanger Feb 15, 2025
5b28797
Fix bad dump of 444-83, move gpp handling to the h89bus class, other …
mgarlanger Feb 23, 2025
cf6df61
Simplify gpp writes, update Ultimeth 4k ROM dip switch definitions
mgarlanger Feb 25, 2025
ee8e8d6
Clean up logs, disable logs, and add documentation for memory decoder…
mgarlanger Feb 25, 2025
836885d
Address review comments
mgarlanger Mar 1, 2025
6439875
minor cleanup
mgarlanger Mar 3, 2025
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4 changes: 4 additions & 0 deletions scripts/src/bus.lua
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Original file line number Diff line number Diff line change
Expand Up @@ -5785,12 +5785,16 @@ if (BUSES["H89BUS"]~=null) then
MAME_DIR .. "src/devices/bus/heathzenith/h89/h_88_5.h",
MAME_DIR .. "src/devices/bus/heathzenith/h89/mms77316_fdc.cpp",
MAME_DIR .. "src/devices/bus/heathzenith/h89/mms77316_fdc.h",
MAME_DIR .. "src/devices/bus/heathzenith/h89/mt_win89.cpp",
MAME_DIR .. "src/devices/bus/heathzenith/h89/mt_win89.h",
MAME_DIR .. "src/devices/bus/heathzenith/h89/sigmasoft_sound.cpp",
MAME_DIR .. "src/devices/bus/heathzenith/h89/sigmasoft_sound.h",
MAME_DIR .. "src/devices/bus/heathzenith/h89/sigmasoft_parallel_port.cpp",
MAME_DIR .. "src/devices/bus/heathzenith/h89/sigmasoft_parallel_port.h",
MAME_DIR .. "src/devices/bus/heathzenith/h89/we_pullup.cpp",
MAME_DIR .. "src/devices/bus/heathzenith/h89/we_pullup.h",
MAME_DIR .. "src/devices/bus/heathzenith/h89/wh_88_16.cpp",
MAME_DIR .. "src/devices/bus/heathzenith/h89/wh_88_16.h",
MAME_DIR .. "src/devices/bus/heathzenith/h89/z_89_11.cpp",
MAME_DIR .. "src/devices/bus/heathzenith/h89/z_89_11.h",
MAME_DIR .. "src/devices/bus/heathzenith/h89/z37_fdc.cpp",
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17 changes: 9 additions & 8 deletions src/devices/bus/heathzenith/h89/cdr_fdc_880h.cpp
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Expand Up @@ -23,7 +23,7 @@
#define LOG_WAIT (1U << 6) // wait mode
#define LOG_DATA (1U << 7) // data read/writes

#define VERBOSE (0xff)
//#define VERBOSE (0xff)

#include "logmacro.h"

Expand All @@ -47,14 +47,14 @@ namespace {
class cdr_fdc_880h_device : public device_t, public device_h89bus_right_card_interface
{
public:
// The controller has two 16L8 PALs which are not dumped (z15 and z20 from schematics).
static constexpr feature_type unemulated_features() { return feature::DISK; }

cdr_fdc_880h_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);

virtual void write(u8 select_lines, u8 offset, u8 data) override;
virtual u8 read(u8 select_lines, u8 offset) override;

// The controller has two 16L8 PALs which are not dumped (z15 and z20 from schematics).
static constexpr feature_type unemulated_features() { return feature::DISK; }

protected:

virtual void device_start() override ATTR_COLD;
Expand Down Expand Up @@ -176,7 +176,7 @@ void cdr_fdc_880h_device::data_w(u8 val)

void cdr_fdc_880h_device::write(u8 select_lines, u8 offset, u8 data)
{
if (!(select_lines & h89bus_device::H89_CASS))
if (!(select_lines & h89bus_device::H89_IO_CASS))
{
return;
}
Expand Down Expand Up @@ -265,7 +265,7 @@ u8 cdr_fdc_880h_device::data_r()

u8 cdr_fdc_880h_device::read(u8 select_lines, u8 offset)
{
if (!(select_lines & h89bus_device::H89_CASS))
if (!(select_lines & h89bus_device::H89_IO_CASS))
{
return 0;
}
Expand Down Expand Up @@ -394,6 +394,7 @@ void cdr_fdc_880h_device::set_drq(int state)
}

}
}

DEFINE_DEVICE_TYPE_PRIVATE(H89BUS_CDR_FDC_880H, device_h89bus_right_card_interface, cdr_fdc_880h_device, "cdr_fdc_880h", "CDR FDC-880H Soft-sectored Controller");
} // anonymous namespace

DEFINE_DEVICE_TYPE_PRIVATE(H89BUS_CDR_FDC_880H, device_h89bus_right_card_interface, cdr_fdc_880h_device, "h89_cdr_fdc_880h", "CDR FDC-880H Soft-sectored Controller");
6 changes: 4 additions & 2 deletions src/devices/bus/heathzenith/h89/h17_fdc.cpp
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Expand Up @@ -46,6 +46,8 @@ namespace {
class heath_h17_fdc_device : public device_t, public device_h89bus_right_card_interface
{
public:
static constexpr feature_type unemulated_features() { return feature::DISK; }

heath_h17_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);

auto floppy_ram_wp_cb() { return m_floppy_ram_wp.bind(); }
Expand Down Expand Up @@ -118,7 +120,7 @@ heath_h17_fdc_device::heath_h17_fdc_device(const machine_config &mconfig, const

void heath_h17_fdc_device::write(u8 select_lines, u8 offset, u8 data)
{
if (!(select_lines & h89bus_device::H89_FLPY))
if (!(select_lines & h89bus_device::H89_IO_FLPY))
{
return;
}
Expand Down Expand Up @@ -250,7 +252,7 @@ void heath_h17_fdc_device::ctrl_w(u8 val)

u8 heath_h17_fdc_device::read(u8 select_lines, u8 offset)
{
if (!(select_lines & h89bus_device::H89_FLPY))
if (!(select_lines & h89bus_device::H89_IO_FLPY))
{
return 0;
}
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3 changes: 0 additions & 3 deletions src/devices/bus/heathzenith/h89/h17_fdc.h
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Expand Up @@ -4,13 +4,10 @@
Heathkit H-17 Floppy Disk Controller
Model number: H-88-1
TODO
- Mame core must support hard-sectored disk images.
- used floppy clock bits to clock USRT received clock.
- Add support for a heath hard-sectored disk support (h17disk).
****************************************************************************/

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