[test, spi_device] Update the tpm test to verify hw registers

Signed-off-by: Douglas Reis <[email protected]>
(cherry picked from commit 6e1731e)

Author: engdoreis

sw/device/tests/spi_device_tpm_tx_rx_test.c

@@ -39,7 +39,7 @@ enum {
 };
 
 const static dif_spi_device_tpm_config_t kTpmConfig = {
-    .interface = kDifSpiDeviceTpmInterfaceCrb,
+    .interface = kDifSpiDeviceTpmInterfaceFifo,
     .disable_return_by_hardware = false,
     .disable_address_prefix_check = false,
     .disable_locality_check = false};
@@ -169,8 +169,17 @@ bool test_main(void) {
   // Sync message with testbench to begin.
   LOG_INFO("SYNC: Begin TPM Test");
 
+  // Enable locality 0, so that sts_reg can be read by the host.
+  enum { kActiveLocalityBit = 5 };
+  CHECK_DIF_OK(dif_spi_device_tpm_set_access_reg(&spi_device, 0,
+                                                 0x01 << kActiveLocalityBit));
+
   for (uint32_t i = 0; i < kIterations; i++) {
     LOG_INFO("Iteration %d", i);
+    CHECK_DIF_OK(dif_spi_device_tpm_set_sts_reg(&spi_device, i));
+    CHECK_DIF_OK(dif_spi_device_tpm_set_int_enable_reg(&spi_device, i + 1));
+    CHECK_DIF_OK(dif_spi_device_tpm_set_int_vector_reg(&spi_device, i + 2));
+    CHECK_DIF_OK(dif_spi_device_tpm_set_int_status_reg(&spi_device, i + 3));
 
     // Wait for write interrupt.
     ATOMIC_WAIT_FOR_INTERRUPT(header_interrupt_received);

sw/host/tests/chip/spi_device/src/spi_device_tpm_test.rs

@@ -42,10 +42,24 @@ fn tpm_read_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     let tpm = tpm::SpiDriver::new(spi, false)?;
     const SIZE: usize = 10;
 
-    for _ in 0..10 {
+    for index in 0..10 {
         let test_data: Vec<u8> = (0..SIZE).map(|_| rand::random()).collect();
         tpm.write_register(tpm::Register::DATA_FIFO, &test_data)?;
         let _ = UartConsole::wait_for(&*uart, r"SYNC: Waiting Read", opts.timeout)?;
+
+        let mut hw_reg_val = [0xaau8; 4];
+        tpm.read_register(tpm::Register::STS, &mut hw_reg_val)?;
+        assert_eq!(hw_reg_val, [index, 0x00, 0x00, 0x00]);
+
+        tpm.read_register(tpm::Register::INT_ENABLE, &mut hw_reg_val)?;
+        assert_eq!(hw_reg_val, [index + 1, 0x00, 0x00, 0x00]);
+
+        tpm.read_register(tpm::Register::INT_VECTOR, &mut hw_reg_val)?;
+        assert_eq!(hw_reg_val, [index + 2, 0xff, 0xff, 0xff]);
+
+        tpm.read_register(tpm::Register::INT_STATUS, &mut hw_reg_val)?;
+        assert_eq!(hw_reg_val, [index + 3, 0x00, 0x00, 0x00]);
+
         let mut buffer = [0xFFu8; SIZE];
         tpm.read_register(tpm::Register::DATA_FIFO, &mut buffer)?;
         assert_eq!(buffer, &test_data[0..SIZE]);