[PHIElimination] Revert #131837 #146320 #146337 #146850
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@llvm/pr-subscribers-llvm-transforms @llvm/pr-subscribers-backend-aarch64 Author: Guy David (guy-david) ChangesReverting because mis-compiles:
Patch is 7.38 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/146850.diff 142 Files Affected:
diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp
index 86523c22a419d..a93a89ecaa96e 100644
--- a/llvm/lib/CodeGen/PHIElimination.cpp
+++ b/llvm/lib/CodeGen/PHIElimination.cpp
@@ -581,20 +581,6 @@ void PHIEliminationImpl::LowerPHINode(MachineBasicBlock &MBB,
continue;
}
- // Reuse an existing copy in the block if possible.
- if (IncomingReg.isVirtual()) {
- MachineInstr *DefMI = MRI->getUniqueVRegDef(SrcReg);
- const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcReg);
- const TargetRegisterClass *IncomingRC = MRI->getRegClass(IncomingReg);
- if (DefMI && DefMI->isCopy() && DefMI->getParent() == &opBlock &&
- MRI->use_empty(SrcReg) && IncomingRC->hasSuperClassEq(SrcRC)) {
- DefMI->getOperand(0).setReg(IncomingReg);
- if (LV)
- LV->getVarInfo(SrcReg).AliveBlocks.clear();
- continue;
- }
- }
-
// Find a safe location to insert the copy, this may be the first terminator
// in the block (or end()).
MachineBasicBlock::iterator InsertPos =
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
index 6c300b04508b2..c1c5c53aa7df2 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
@@ -118,8 +118,8 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
; -O0: bl __aarch64_cas16_relax
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -131,8 +131,8 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
; -O0: bl __aarch64_cas16_relax
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -144,8 +144,8 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
; -O0: bl __aarch64_cas16_rel
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -157,8 +157,8 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
; -O0: bl __aarch64_cas16_acq_rel
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
index 2a7bbad9d6454..d1047d84e2956 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
@@ -117,13 +117,13 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -134,13 +134,13 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -151,13 +151,13 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -168,13 +168,13 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
-; -O0: ldaxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldaxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
index 493bc742f7663..1a79c73355143 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
@@ -117,13 +117,13 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -134,13 +134,13 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -151,13 +151,13 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -168,13 +168,13 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
-; -O0: ldaxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldaxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir b/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
index 993d1c1f1b5f0..01c44e3f253bb 100644
--- a/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
+++ b/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
@@ -37,7 +37,7 @@ body: |
bb.1:
%x:gpr32 = COPY $wzr
; Test that the debug location is not copied into bb1!
- ; CHECK: %3:gpr32 = COPY $wzr
+ ; CHECK: %3:gpr32 = COPY killed %x{{$}}
; CHECK-LABEL: bb.2:
bb.2:
%y:gpr32 = PHI %x:gpr32, %bb.1, undef %undef:gpr32, %bb.0, debug-location !14
diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir b/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir
deleted file mode 100644
index 20020a8ed3fb7..0000000000000
--- a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir
+++ /dev/null
@@ -1,193 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -run-pass=livevars,phi-node-elimination -verify-machineinstrs -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
-
-# Verify that the original COPY in bb.1 is reappropriated as the PHI source in bb.2,
-# instead of creating a new COPY with the same source register.
-
----
-name: copy_virtual_reg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_virtual_reg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv, $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:gpr32 = COPY killed $w0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed %a
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: %c:gpr32 = COPY killed [[DEF]]
- ; CHECK-NEXT: dead %d:gpr32 = COPY killed %c
- bb.0:
- liveins: $nzcv, $w0
- %a:gpr32 = COPY $w0
- Bcc 8, %bb.2, implicit $nzcv
- bb.1:
- %b:gpr32 = COPY %a:gpr32
- bb.2:
- %c:gpr32 = PHI %b:gpr32, %bb.1, undef %undef:gpr32, %bb.0
- %d:gpr32 = COPY %c:gpr32
-...
-
----
-name: copy_physical_reg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_physical_reg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv, $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead $x0 = IMPLICIT_DEF implicit-def $w0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: dead %b:gpr32 = COPY killed [[DEF]]
- bb.0:
- liveins: $nzcv, $w0
- Bcc 8, %bb.2, implicit $nzcv
- bb.1:
- $x0 = IMPLICIT_DEF
- %a:gpr32 = COPY $w0
- bb.2:
- %b:gpr32 = PHI %a:gpr32, %bb.1, undef %undef:gpr32, %bb.0
-...
-
----
-name: copy_to_dead
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_to_dead
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $wzr, $xzr
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $wzr
- ; CHECK-NEXT: dead [[COPY1:%[0-9]+]]:gpr64 = COPY $xzr
- ; CHECK-NEXT: TBZW killed [[COPY]], 0, %bb.2
- ; CHECK-NEXT: B %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[DEF:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: dead [[DEF1:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.2
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[DEF2:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: dead [[DEF3:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.1
- bb.0:
- liveins: $wzr, $xzr
-
- %9:gpr32 = COPY $wzr
- dead %5:gpr64 = COPY $xzr
- TBZW killed %9:gpr32, 0, %bb.2
- B %bb.1
-
- bb.1:
- successors: %bb.2(0x80000000); %bb.2(100.00%)
-
- dead %1:gpr64 = PHI undef %3:gpr64, %bb.2, undef %5:gpr64, %bb.0
- dead %2:gpr64 = PHI undef %4:gpr64, %bb.2, undef %5:gpr64, %bb.0
- B %bb.2
-
- bb.2:
- successors: %bb.1(0x80000000); %bb.1(100.00%)
-
- dead %3:gpr64 = PHI undef %1:gpr64, %bb.1, undef %5:gpr64, %bb.0
- dead %4:gpr64 = PHI undef %2:gpr64, %bb.1, undef %5:gpr64, %bb.0
- B %bb.1
-
-...
-
----
-name: update_livevars
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: update_livevars
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $w0, $w1, $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY killed $w0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY killed $w1
- ; CHECK-NEXT: B %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]]
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
- ; CHECK-NEXT: Bcc 1, %bb.1, implicit $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.1
- bb.0:
- successors: %bb.1
- liveins: $w0, $w1, $nzcv
-
- %0:gpr32 = COPY killed $w0
- %1:gpr32 = COPY killed $w1
- B %bb.1
-
- bb.1:
- successors: %bb.2, %bb.1
- liveins: $nzcv
-
- %2:gpr32 = PHI %3, %bb.2, %1, %bb.0, %3, %bb.1
- %3:gpr32 = COPY %0
- Bcc 1, %bb.1, implicit $nzcv
-
- bb.2:
- successors: %bb.1
- liveins: $nzcv
-
- B %bb.1
-...
-
----
-name: copy_subreg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_subreg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $x0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY killed $x0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY killed [[COPY]]
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]].sub_32
- bb.0:
- successors: %bb.1
- liveins: $x0
-
- %0:gpr64 = COPY killed $x0
- %1:gpr64 = COPY killed %0
-
- bb.1:
- %2:gpr32 = PHI %1.sub_32, %bb.0
-...
diff --git a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
index ca1052a769408..8655bb1292ef7 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
@@ -583,8 +583,8 @@ define i16 @red_mla_dup_ext_u8_s8_s16(ptr noalias nocapture noundef readonly %A,
; CHECK-SD-NEXT: mov w10, w2
; CHECK-SD-NEXT: b.hi .LBB5_4
; CHECK-SD-NEXT: // %bb.2:
-; CHECK-SD-NEXT: mov w8, wzr
; CHECK-SD-NEXT: mov x11, xzr
+; CHECK-SD-NEXT: mov w8, wzr
; CHECK-SD-NEXT: b .LBB5_7
; CHECK-SD-NEXT: .LBB5_3:
; CHECK-SD-NEXT: mov w8, wzr
diff --git a/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll b/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
index 9fd27edae3176..71e0250b36972 100644
--- a/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
+++ b/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
@@ -199,16 +199,16 @@ define i128 @test_rmw_add_128(ptr %dst) {
; NOLSE-NEXT: sub sp, sp, #48
; NOLSE-NEXT: .cfi_def_cfa_offset 48
; NOLSE-NEXT: str x0, [sp, #24] // 8-byte Folded Spill
-; NOLSE-NEXT: ldr x9, [x0, #8]
-; NOLSE-NEXT: ldr x8, [x0]
+; NOLSE-NEXT: ldr x8, [x0, #8]
+; NOLSE-NEXT: ldr x9, [x0]
; NOLSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
; NOLSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; NOLSE-NEXT: b .LBB4_1
; NOLSE-NEXT: .LBB4_1: // %atomicrmw.start
; NOLSE-NEXT: // =>This Loop Header: Depth=1
; NOLSE-NEXT: // Child Loop BB4_2 Depth 2
-; NOLSE-NEXT: ldr x13, [sp, #32] // 8-byte Folded Reload
-; NOLSE-NEXT: ldr x11, [sp, #40] // 8-byte Folded Reload
+; NOLSE-NEXT: ldr x13, [sp, #40] // 8-byte Folded Reload
+; NOLSE-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
; NOLSE-NEXT: ldr x9, [sp, #24] // 8-byte Folded Reload
; NOLSE-NEXT: adds x14, x11, #1
; NOLSE-NEXT: cinc x15, x13, hs
@@ -238,8 +238,8 @@ define i128 @test_rmw_add_128(ptr %dst) {
; NOLSE-NEXT: str x9, [sp, #16] // 8-byte Folded Spill
; NOLSE-NEXT: subs x12, x12, x13
; NOLSE-NEXT: ccmp x10, x11, #0, eq
-; NOLSE-NEXT: str x9, [sp, #40] // 8-byte Folded Spill
-; NOLSE-NEXT: str x8, [sp, #32] // 8-byte Folded Spill
+; NOLSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
+; NOLSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; NOLSE-NEXT: b.ne .LBB4_1
; NOLSE-NEXT: b .LBB4_6
; NOLSE-NEXT: .LBB4_6: // %atomicrmw.end
@@ -253,15 +253,15 @@ define i128 @test_rmw_add_128(ptr %dst) {
; LSE-NEXT: sub sp, sp, #48
; LSE-NEXT: .cfi_def_cfa_offset 48
; LSE-NEXT: str x0, [sp, #24] // 8-byte Folded Spill
-; LSE-NEXT: ldr x9, [x0, #8]
-; LSE-NEXT: ldr x8, [x0]
+; LSE-NEXT: ldr x8, [x0, #8]
+; LSE-NEXT: ldr x9, [x0]
; LSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
; LSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; LSE-NEXT: b .LBB4_1
; LSE-NEXT: .LBB4_1: // %atomicrmw.start
; LSE-NEXT: // =>This Inner Loop Header: Depth=1
-; LSE-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
-; LSE-NEXT: ldr x10, [sp, #40] // 8-byte Folded Reload
+; LSE-NEXT: ldr x11, [sp, #40] // 8-byte Folded Reload
+; LSE-NEXT: ldr x10, [sp, #32] // 8-byte Folded Reload
; LSE-NEXT: ldr x8, [sp, #24] // 8-byte Folded Reload
; LSE-NEXT: mov x0, x10
; LSE-NEXT: mov x1, x11
@@ -276,8 +276,8 @@ define i128 @test_rmw_add_128(ptr %dst) {
; LSE-NEXT: str x8, [sp, #16] // 8-byte Folded Spill
; LSE-NEXT: subs x11, x8, x11
; LSE-NEXT: ccmp x9, x10, #0, eq
-; LSE-NEXT: str x9, [sp, #40] // 8-byte Folded Spill
-; LSE-NEXT: str x8, [sp, #32] // 8-byte Folded Spill
+; LSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
+; LSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; LSE-NEXT: b.ne .LBB4_1
; LSE-NEXT: b .LBB4_2
; LSE-NEXT: .LBB4_2: // %atomicrmw.end
@@ -573,16 +573,16 @@ define i128 @test_rmw_nand_1...
[truncated]
|
|
@llvm/pr-subscribers-backend-powerpc Author: Guy David (guy-david) ChangesReverting because mis-compiles:
Patch is 7.38 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/146850.diff 142 Files Affected:
diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp
index 86523c22a419d..a93a89ecaa96e 100644
--- a/llvm/lib/CodeGen/PHIElimination.cpp
+++ b/llvm/lib/CodeGen/PHIElimination.cpp
@@ -581,20 +581,6 @@ void PHIEliminationImpl::LowerPHINode(MachineBasicBlock &MBB,
continue;
}
- // Reuse an existing copy in the block if possible.
- if (IncomingReg.isVirtual()) {
- MachineInstr *DefMI = MRI->getUniqueVRegDef(SrcReg);
- const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcReg);
- const TargetRegisterClass *IncomingRC = MRI->getRegClass(IncomingReg);
- if (DefMI && DefMI->isCopy() && DefMI->getParent() == &opBlock &&
- MRI->use_empty(SrcReg) && IncomingRC->hasSuperClassEq(SrcRC)) {
- DefMI->getOperand(0).setReg(IncomingReg);
- if (LV)
- LV->getVarInfo(SrcReg).AliveBlocks.clear();
- continue;
- }
- }
-
// Find a safe location to insert the copy, this may be the first terminator
// in the block (or end()).
MachineBasicBlock::iterator InsertPos =
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
index 6c300b04508b2..c1c5c53aa7df2 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
@@ -118,8 +118,8 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
; -O0: bl __aarch64_cas16_relax
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -131,8 +131,8 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
; -O0: bl __aarch64_cas16_relax
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -144,8 +144,8 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
; -O0: bl __aarch64_cas16_rel
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -157,8 +157,8 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
; -O0: bl __aarch64_cas16_acq_rel
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
index 2a7bbad9d6454..d1047d84e2956 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
@@ -117,13 +117,13 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -134,13 +134,13 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -151,13 +151,13 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -168,13 +168,13 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
-; -O0: ldaxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldaxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
index 493bc742f7663..1a79c73355143 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
@@ -117,13 +117,13 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -134,13 +134,13 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -151,13 +151,13 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -168,13 +168,13 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
-; -O0: ldaxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldaxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir b/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
index 993d1c1f1b5f0..01c44e3f253bb 100644
--- a/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
+++ b/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
@@ -37,7 +37,7 @@ body: |
bb.1:
%x:gpr32 = COPY $wzr
; Test that the debug location is not copied into bb1!
- ; CHECK: %3:gpr32 = COPY $wzr
+ ; CHECK: %3:gpr32 = COPY killed %x{{$}}
; CHECK-LABEL: bb.2:
bb.2:
%y:gpr32 = PHI %x:gpr32, %bb.1, undef %undef:gpr32, %bb.0, debug-location !14
diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir b/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir
deleted file mode 100644
index 20020a8ed3fb7..0000000000000
--- a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir
+++ /dev/null
@@ -1,193 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -run-pass=livevars,phi-node-elimination -verify-machineinstrs -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
-
-# Verify that the original COPY in bb.1 is reappropriated as the PHI source in bb.2,
-# instead of creating a new COPY with the same source register.
-
----
-name: copy_virtual_reg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_virtual_reg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv, $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:gpr32 = COPY killed $w0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed %a
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: %c:gpr32 = COPY killed [[DEF]]
- ; CHECK-NEXT: dead %d:gpr32 = COPY killed %c
- bb.0:
- liveins: $nzcv, $w0
- %a:gpr32 = COPY $w0
- Bcc 8, %bb.2, implicit $nzcv
- bb.1:
- %b:gpr32 = COPY %a:gpr32
- bb.2:
- %c:gpr32 = PHI %b:gpr32, %bb.1, undef %undef:gpr32, %bb.0
- %d:gpr32 = COPY %c:gpr32
-...
-
----
-name: copy_physical_reg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_physical_reg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv, $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead $x0 = IMPLICIT_DEF implicit-def $w0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: dead %b:gpr32 = COPY killed [[DEF]]
- bb.0:
- liveins: $nzcv, $w0
- Bcc 8, %bb.2, implicit $nzcv
- bb.1:
- $x0 = IMPLICIT_DEF
- %a:gpr32 = COPY $w0
- bb.2:
- %b:gpr32 = PHI %a:gpr32, %bb.1, undef %undef:gpr32, %bb.0
-...
-
----
-name: copy_to_dead
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_to_dead
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $wzr, $xzr
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $wzr
- ; CHECK-NEXT: dead [[COPY1:%[0-9]+]]:gpr64 = COPY $xzr
- ; CHECK-NEXT: TBZW killed [[COPY]], 0, %bb.2
- ; CHECK-NEXT: B %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[DEF:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: dead [[DEF1:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.2
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[DEF2:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: dead [[DEF3:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.1
- bb.0:
- liveins: $wzr, $xzr
-
- %9:gpr32 = COPY $wzr
- dead %5:gpr64 = COPY $xzr
- TBZW killed %9:gpr32, 0, %bb.2
- B %bb.1
-
- bb.1:
- successors: %bb.2(0x80000000); %bb.2(100.00%)
-
- dead %1:gpr64 = PHI undef %3:gpr64, %bb.2, undef %5:gpr64, %bb.0
- dead %2:gpr64 = PHI undef %4:gpr64, %bb.2, undef %5:gpr64, %bb.0
- B %bb.2
-
- bb.2:
- successors: %bb.1(0x80000000); %bb.1(100.00%)
-
- dead %3:gpr64 = PHI undef %1:gpr64, %bb.1, undef %5:gpr64, %bb.0
- dead %4:gpr64 = PHI undef %2:gpr64, %bb.1, undef %5:gpr64, %bb.0
- B %bb.1
-
-...
-
----
-name: update_livevars
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: update_livevars
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $w0, $w1, $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY killed $w0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY killed $w1
- ; CHECK-NEXT: B %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]]
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
- ; CHECK-NEXT: Bcc 1, %bb.1, implicit $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.1
- bb.0:
- successors: %bb.1
- liveins: $w0, $w1, $nzcv
-
- %0:gpr32 = COPY killed $w0
- %1:gpr32 = COPY killed $w1
- B %bb.1
-
- bb.1:
- successors: %bb.2, %bb.1
- liveins: $nzcv
-
- %2:gpr32 = PHI %3, %bb.2, %1, %bb.0, %3, %bb.1
- %3:gpr32 = COPY %0
- Bcc 1, %bb.1, implicit $nzcv
-
- bb.2:
- successors: %bb.1
- liveins: $nzcv
-
- B %bb.1
-...
-
----
-name: copy_subreg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_subreg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $x0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY killed $x0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY killed [[COPY]]
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]].sub_32
- bb.0:
- successors: %bb.1
- liveins: $x0
-
- %0:gpr64 = COPY killed $x0
- %1:gpr64 = COPY killed %0
-
- bb.1:
- %2:gpr32 = PHI %1.sub_32, %bb.0
-...
diff --git a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
index ca1052a769408..8655bb1292ef7 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
@@ -583,8 +583,8 @@ define i16 @red_mla_dup_ext_u8_s8_s16(ptr noalias nocapture noundef readonly %A,
; CHECK-SD-NEXT: mov w10, w2
; CHECK-SD-NEXT: b.hi .LBB5_4
; CHECK-SD-NEXT: // %bb.2:
-; CHECK-SD-NEXT: mov w8, wzr
; CHECK-SD-NEXT: mov x11, xzr
+; CHECK-SD-NEXT: mov w8, wzr
; CHECK-SD-NEXT: b .LBB5_7
; CHECK-SD-NEXT: .LBB5_3:
; CHECK-SD-NEXT: mov w8, wzr
diff --git a/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll b/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
index 9fd27edae3176..71e0250b36972 100644
--- a/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
+++ b/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
@@ -199,16 +199,16 @@ define i128 @test_rmw_add_128(ptr %dst) {
; NOLSE-NEXT: sub sp, sp, #48
; NOLSE-NEXT: .cfi_def_cfa_offset 48
; NOLSE-NEXT: str x0, [sp, #24] // 8-byte Folded Spill
-; NOLSE-NEXT: ldr x9, [x0, #8]
-; NOLSE-NEXT: ldr x8, [x0]
+; NOLSE-NEXT: ldr x8, [x0, #8]
+; NOLSE-NEXT: ldr x9, [x0]
; NOLSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
; NOLSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; NOLSE-NEXT: b .LBB4_1
; NOLSE-NEXT: .LBB4_1: // %atomicrmw.start
; NOLSE-NEXT: // =>This Loop Header: Depth=1
; NOLSE-NEXT: // Child Loop BB4_2 Depth 2
-; NOLSE-NEXT: ldr x13, [sp, #32] // 8-byte Folded Reload
-; NOLSE-NEXT: ldr x11, [sp, #40] // 8-byte Folded Reload
+; NOLSE-NEXT: ldr x13, [sp, #40] // 8-byte Folded Reload
+; NOLSE-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
; NOLSE-NEXT: ldr x9, [sp, #24] // 8-byte Folded Reload
; NOLSE-NEXT: adds x14, x11, #1
; NOLSE-NEXT: cinc x15, x13, hs
@@ -238,8 +238,8 @@ define i128 @test_rmw_add_128(ptr %dst) {
; NOLSE-NEXT: str x9, [sp, #16] // 8-byte Folded Spill
; NOLSE-NEXT: subs x12, x12, x13
; NOLSE-NEXT: ccmp x10, x11, #0, eq
-; NOLSE-NEXT: str x9, [sp, #40] // 8-byte Folded Spill
-; NOLSE-NEXT: str x8, [sp, #32] // 8-byte Folded Spill
+; NOLSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
+; NOLSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; NOLSE-NEXT: b.ne .LBB4_1
; NOLSE-NEXT: b .LBB4_6
; NOLSE-NEXT: .LBB4_6: // %atomicrmw.end
@@ -253,15 +253,15 @@ define i128 @test_rmw_add_128(ptr %dst) {
; LSE-NEXT: sub sp, sp, #48
; LSE-NEXT: .cfi_def_cfa_offset 48
; LSE-NEXT: str x0, [sp, #24] // 8-byte Folded Spill
-; LSE-NEXT: ldr x9, [x0, #8]
-; LSE-NEXT: ldr x8, [x0]
+; LSE-NEXT: ldr x8, [x0, #8]
+; LSE-NEXT: ldr x9, [x0]
; LSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
; LSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; LSE-NEXT: b .LBB4_1
; LSE-NEXT: .LBB4_1: // %atomicrmw.start
; LSE-NEXT: // =>This Inner Loop Header: Depth=1
-; LSE-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
-; LSE-NEXT: ldr x10, [sp, #40] // 8-byte Folded Reload
+; LSE-NEXT: ldr x11, [sp, #40] // 8-byte Folded Reload
+; LSE-NEXT: ldr x10, [sp, #32] // 8-byte Folded Reload
; LSE-NEXT: ldr x8, [sp, #24] // 8-byte Folded Reload
; LSE-NEXT: mov x0, x10
; LSE-NEXT: mov x1, x11
@@ -276,8 +276,8 @@ define i128 @test_rmw_add_128(ptr %dst) {
; LSE-NEXT: str x8, [sp, #16] // 8-byte Folded Spill
; LSE-NEXT: subs x11, x8, x11
; LSE-NEXT: ccmp x9, x10, #0, eq
-; LSE-NEXT: str x9, [sp, #40] // 8-byte Folded Spill
-; LSE-NEXT: str x8, [sp, #32] // 8-byte Folded Spill
+; LSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
+; LSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; LSE-NEXT: b.ne .LBB4_1
; LSE-NEXT: b .LBB4_2
; LSE-NEXT: .LBB4_2: // %atomicrmw.end
@@ -573,16 +573,16 @@ define i128 @test_rmw_nand_1...
[truncated]
|
|
@llvm/pr-subscribers-backend-amdgpu Author: Guy David (guy-david) ChangesReverting because mis-compiles:
Patch is 7.38 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/146850.diff 142 Files Affected:
diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp
index 86523c22a419d..a93a89ecaa96e 100644
--- a/llvm/lib/CodeGen/PHIElimination.cpp
+++ b/llvm/lib/CodeGen/PHIElimination.cpp
@@ -581,20 +581,6 @@ void PHIEliminationImpl::LowerPHINode(MachineBasicBlock &MBB,
continue;
}
- // Reuse an existing copy in the block if possible.
- if (IncomingReg.isVirtual()) {
- MachineInstr *DefMI = MRI->getUniqueVRegDef(SrcReg);
- const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcReg);
- const TargetRegisterClass *IncomingRC = MRI->getRegClass(IncomingReg);
- if (DefMI && DefMI->isCopy() && DefMI->getParent() == &opBlock &&
- MRI->use_empty(SrcReg) && IncomingRC->hasSuperClassEq(SrcRC)) {
- DefMI->getOperand(0).setReg(IncomingReg);
- if (LV)
- LV->getVarInfo(SrcReg).AliveBlocks.clear();
- continue;
- }
- }
-
// Find a safe location to insert the copy, this may be the first terminator
// in the block (or end()).
MachineBasicBlock::iterator InsertPos =
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
index 6c300b04508b2..c1c5c53aa7df2 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
@@ -118,8 +118,8 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
; -O0: bl __aarch64_cas16_relax
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -131,8 +131,8 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
; -O0: bl __aarch64_cas16_relax
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -144,8 +144,8 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
; -O0: bl __aarch64_cas16_rel
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -157,8 +157,8 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
; -O0: bl __aarch64_cas16_acq_rel
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
index 2a7bbad9d6454..d1047d84e2956 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
@@ -117,13 +117,13 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -134,13 +134,13 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -151,13 +151,13 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -168,13 +168,13 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
-; -O0: ldaxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldaxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
index 493bc742f7663..1a79c73355143 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
@@ -117,13 +117,13 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -134,13 +134,13 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -151,13 +151,13 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -168,13 +168,13 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
-; -O0: ldaxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldaxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir b/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
index 993d1c1f1b5f0..01c44e3f253bb 100644
--- a/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
+++ b/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
@@ -37,7 +37,7 @@ body: |
bb.1:
%x:gpr32 = COPY $wzr
; Test that the debug location is not copied into bb1!
- ; CHECK: %3:gpr32 = COPY $wzr
+ ; CHECK: %3:gpr32 = COPY killed %x{{$}}
; CHECK-LABEL: bb.2:
bb.2:
%y:gpr32 = PHI %x:gpr32, %bb.1, undef %undef:gpr32, %bb.0, debug-location !14
diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir b/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir
deleted file mode 100644
index 20020a8ed3fb7..0000000000000
--- a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir
+++ /dev/null
@@ -1,193 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -run-pass=livevars,phi-node-elimination -verify-machineinstrs -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
-
-# Verify that the original COPY in bb.1 is reappropriated as the PHI source in bb.2,
-# instead of creating a new COPY with the same source register.
-
----
-name: copy_virtual_reg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_virtual_reg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv, $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:gpr32 = COPY killed $w0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed %a
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: %c:gpr32 = COPY killed [[DEF]]
- ; CHECK-NEXT: dead %d:gpr32 = COPY killed %c
- bb.0:
- liveins: $nzcv, $w0
- %a:gpr32 = COPY $w0
- Bcc 8, %bb.2, implicit $nzcv
- bb.1:
- %b:gpr32 = COPY %a:gpr32
- bb.2:
- %c:gpr32 = PHI %b:gpr32, %bb.1, undef %undef:gpr32, %bb.0
- %d:gpr32 = COPY %c:gpr32
-...
-
----
-name: copy_physical_reg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_physical_reg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv, $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead $x0 = IMPLICIT_DEF implicit-def $w0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: dead %b:gpr32 = COPY killed [[DEF]]
- bb.0:
- liveins: $nzcv, $w0
- Bcc 8, %bb.2, implicit $nzcv
- bb.1:
- $x0 = IMPLICIT_DEF
- %a:gpr32 = COPY $w0
- bb.2:
- %b:gpr32 = PHI %a:gpr32, %bb.1, undef %undef:gpr32, %bb.0
-...
-
----
-name: copy_to_dead
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_to_dead
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $wzr, $xzr
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $wzr
- ; CHECK-NEXT: dead [[COPY1:%[0-9]+]]:gpr64 = COPY $xzr
- ; CHECK-NEXT: TBZW killed [[COPY]], 0, %bb.2
- ; CHECK-NEXT: B %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[DEF:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: dead [[DEF1:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.2
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[DEF2:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: dead [[DEF3:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.1
- bb.0:
- liveins: $wzr, $xzr
-
- %9:gpr32 = COPY $wzr
- dead %5:gpr64 = COPY $xzr
- TBZW killed %9:gpr32, 0, %bb.2
- B %bb.1
-
- bb.1:
- successors: %bb.2(0x80000000); %bb.2(100.00%)
-
- dead %1:gpr64 = PHI undef %3:gpr64, %bb.2, undef %5:gpr64, %bb.0
- dead %2:gpr64 = PHI undef %4:gpr64, %bb.2, undef %5:gpr64, %bb.0
- B %bb.2
-
- bb.2:
- successors: %bb.1(0x80000000); %bb.1(100.00%)
-
- dead %3:gpr64 = PHI undef %1:gpr64, %bb.1, undef %5:gpr64, %bb.0
- dead %4:gpr64 = PHI undef %2:gpr64, %bb.1, undef %5:gpr64, %bb.0
- B %bb.1
-
-...
-
----
-name: update_livevars
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: update_livevars
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $w0, $w1, $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY killed $w0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY killed $w1
- ; CHECK-NEXT: B %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]]
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
- ; CHECK-NEXT: Bcc 1, %bb.1, implicit $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.1
- bb.0:
- successors: %bb.1
- liveins: $w0, $w1, $nzcv
-
- %0:gpr32 = COPY killed $w0
- %1:gpr32 = COPY killed $w1
- B %bb.1
-
- bb.1:
- successors: %bb.2, %bb.1
- liveins: $nzcv
-
- %2:gpr32 = PHI %3, %bb.2, %1, %bb.0, %3, %bb.1
- %3:gpr32 = COPY %0
- Bcc 1, %bb.1, implicit $nzcv
-
- bb.2:
- successors: %bb.1
- liveins: $nzcv
-
- B %bb.1
-...
-
----
-name: copy_subreg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_subreg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $x0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY killed $x0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY killed [[COPY]]
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]].sub_32
- bb.0:
- successors: %bb.1
- liveins: $x0
-
- %0:gpr64 = COPY killed $x0
- %1:gpr64 = COPY killed %0
-
- bb.1:
- %2:gpr32 = PHI %1.sub_32, %bb.0
-...
diff --git a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
index ca1052a769408..8655bb1292ef7 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
@@ -583,8 +583,8 @@ define i16 @red_mla_dup_ext_u8_s8_s16(ptr noalias nocapture noundef readonly %A,
; CHECK-SD-NEXT: mov w10, w2
; CHECK-SD-NEXT: b.hi .LBB5_4
; CHECK-SD-NEXT: // %bb.2:
-; CHECK-SD-NEXT: mov w8, wzr
; CHECK-SD-NEXT: mov x11, xzr
+; CHECK-SD-NEXT: mov w8, wzr
; CHECK-SD-NEXT: b .LBB5_7
; CHECK-SD-NEXT: .LBB5_3:
; CHECK-SD-NEXT: mov w8, wzr
diff --git a/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll b/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
index 9fd27edae3176..71e0250b36972 100644
--- a/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
+++ b/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
@@ -199,16 +199,16 @@ define i128 @test_rmw_add_128(ptr %dst) {
; NOLSE-NEXT: sub sp, sp, #48
; NOLSE-NEXT: .cfi_def_cfa_offset 48
; NOLSE-NEXT: str x0, [sp, #24] // 8-byte Folded Spill
-; NOLSE-NEXT: ldr x9, [x0, #8]
-; NOLSE-NEXT: ldr x8, [x0]
+; NOLSE-NEXT: ldr x8, [x0, #8]
+; NOLSE-NEXT: ldr x9, [x0]
; NOLSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
; NOLSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; NOLSE-NEXT: b .LBB4_1
; NOLSE-NEXT: .LBB4_1: // %atomicrmw.start
; NOLSE-NEXT: // =>This Loop Header: Depth=1
; NOLSE-NEXT: // Child Loop BB4_2 Depth 2
-; NOLSE-NEXT: ldr x13, [sp, #32] // 8-byte Folded Reload
-; NOLSE-NEXT: ldr x11, [sp, #40] // 8-byte Folded Reload
+; NOLSE-NEXT: ldr x13, [sp, #40] // 8-byte Folded Reload
+; NOLSE-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
; NOLSE-NEXT: ldr x9, [sp, #24] // 8-byte Folded Reload
; NOLSE-NEXT: adds x14, x11, #1
; NOLSE-NEXT: cinc x15, x13, hs
@@ -238,8 +238,8 @@ define i128 @test_rmw_add_128(ptr %dst) {
; NOLSE-NEXT: str x9, [sp, #16] // 8-byte Folded Spill
; NOLSE-NEXT: subs x12, x12, x13
; NOLSE-NEXT: ccmp x10, x11, #0, eq
-; NOLSE-NEXT: str x9, [sp, #40] // 8-byte Folded Spill
-; NOLSE-NEXT: str x8, [sp, #32] // 8-byte Folded Spill
+; NOLSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
+; NOLSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; NOLSE-NEXT: b.ne .LBB4_1
; NOLSE-NEXT: b .LBB4_6
; NOLSE-NEXT: .LBB4_6: // %atomicrmw.end
@@ -253,15 +253,15 @@ define i128 @test_rmw_add_128(ptr %dst) {
; LSE-NEXT: sub sp, sp, #48
; LSE-NEXT: .cfi_def_cfa_offset 48
; LSE-NEXT: str x0, [sp, #24] // 8-byte Folded Spill
-; LSE-NEXT: ldr x9, [x0, #8]
-; LSE-NEXT: ldr x8, [x0]
+; LSE-NEXT: ldr x8, [x0, #8]
+; LSE-NEXT: ldr x9, [x0]
; LSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
; LSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; LSE-NEXT: b .LBB4_1
; LSE-NEXT: .LBB4_1: // %atomicrmw.start
; LSE-NEXT: // =>This Inner Loop Header: Depth=1
-; LSE-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
-; LSE-NEXT: ldr x10, [sp, #40] // 8-byte Folded Reload
+; LSE-NEXT: ldr x11, [sp, #40] // 8-byte Folded Reload
+; LSE-NEXT: ldr x10, [sp, #32] // 8-byte Folded Reload
; LSE-NEXT: ldr x8, [sp, #24] // 8-byte Folded Reload
; LSE-NEXT: mov x0, x10
; LSE-NEXT: mov x1, x11
@@ -276,8 +276,8 @@ define i128 @test_rmw_add_128(ptr %dst) {
; LSE-NEXT: str x8, [sp, #16] // 8-byte Folded Spill
; LSE-NEXT: subs x11, x8, x11
; LSE-NEXT: ccmp x9, x10, #0, eq
-; LSE-NEXT: str x9, [sp, #40] // 8-byte Folded Spill
-; LSE-NEXT: str x8, [sp, #32] // 8-byte Folded Spill
+; LSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
+; LSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; LSE-NEXT: b.ne .LBB4_1
; LSE-NEXT: b .LBB4_2
; LSE-NEXT: .LBB4_2: // %atomicrmw.end
@@ -573,16 +573,16 @@ define i128 @test_rmw_nand_1...
[truncated]
|
|
@llvm/pr-subscribers-backend-loongarch Author: Guy David (guy-david) ChangesReverting because mis-compiles:
Patch is 7.38 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/146850.diff 142 Files Affected:
diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp
index 86523c22a419d..a93a89ecaa96e 100644
--- a/llvm/lib/CodeGen/PHIElimination.cpp
+++ b/llvm/lib/CodeGen/PHIElimination.cpp
@@ -581,20 +581,6 @@ void PHIEliminationImpl::LowerPHINode(MachineBasicBlock &MBB,
continue;
}
- // Reuse an existing copy in the block if possible.
- if (IncomingReg.isVirtual()) {
- MachineInstr *DefMI = MRI->getUniqueVRegDef(SrcReg);
- const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcReg);
- const TargetRegisterClass *IncomingRC = MRI->getRegClass(IncomingReg);
- if (DefMI && DefMI->isCopy() && DefMI->getParent() == &opBlock &&
- MRI->use_empty(SrcReg) && IncomingRC->hasSuperClassEq(SrcRC)) {
- DefMI->getOperand(0).setReg(IncomingReg);
- if (LV)
- LV->getVarInfo(SrcReg).AliveBlocks.clear();
- continue;
- }
- }
-
// Find a safe location to insert the copy, this may be the first terminator
// in the block (or end()).
MachineBasicBlock::iterator InsertPos =
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
index 6c300b04508b2..c1c5c53aa7df2 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
@@ -118,8 +118,8 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
; -O0: bl __aarch64_cas16_relax
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -131,8 +131,8 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
; -O0: bl __aarch64_cas16_relax
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -144,8 +144,8 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
; -O0: bl __aarch64_cas16_rel
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -157,8 +157,8 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
; -O0: bl __aarch64_cas16_acq_rel
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
index 2a7bbad9d6454..d1047d84e2956 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
@@ -117,13 +117,13 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -134,13 +134,13 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -151,13 +151,13 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -168,13 +168,13 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
-; -O0: ldaxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldaxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
index 493bc742f7663..1a79c73355143 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
@@ -117,13 +117,13 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -134,13 +134,13 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -151,13 +151,13 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -168,13 +168,13 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
-; -O0: ldaxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldaxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir b/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
index 993d1c1f1b5f0..01c44e3f253bb 100644
--- a/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
+++ b/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
@@ -37,7 +37,7 @@ body: |
bb.1:
%x:gpr32 = COPY $wzr
; Test that the debug location is not copied into bb1!
- ; CHECK: %3:gpr32 = COPY $wzr
+ ; CHECK: %3:gpr32 = COPY killed %x{{$}}
; CHECK-LABEL: bb.2:
bb.2:
%y:gpr32 = PHI %x:gpr32, %bb.1, undef %undef:gpr32, %bb.0, debug-location !14
diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir b/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir
deleted file mode 100644
index 20020a8ed3fb7..0000000000000
--- a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir
+++ /dev/null
@@ -1,193 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -run-pass=livevars,phi-node-elimination -verify-machineinstrs -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
-
-# Verify that the original COPY in bb.1 is reappropriated as the PHI source in bb.2,
-# instead of creating a new COPY with the same source register.
-
----
-name: copy_virtual_reg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_virtual_reg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv, $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:gpr32 = COPY killed $w0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed %a
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: %c:gpr32 = COPY killed [[DEF]]
- ; CHECK-NEXT: dead %d:gpr32 = COPY killed %c
- bb.0:
- liveins: $nzcv, $w0
- %a:gpr32 = COPY $w0
- Bcc 8, %bb.2, implicit $nzcv
- bb.1:
- %b:gpr32 = COPY %a:gpr32
- bb.2:
- %c:gpr32 = PHI %b:gpr32, %bb.1, undef %undef:gpr32, %bb.0
- %d:gpr32 = COPY %c:gpr32
-...
-
----
-name: copy_physical_reg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_physical_reg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv, $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead $x0 = IMPLICIT_DEF implicit-def $w0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: dead %b:gpr32 = COPY killed [[DEF]]
- bb.0:
- liveins: $nzcv, $w0
- Bcc 8, %bb.2, implicit $nzcv
- bb.1:
- $x0 = IMPLICIT_DEF
- %a:gpr32 = COPY $w0
- bb.2:
- %b:gpr32 = PHI %a:gpr32, %bb.1, undef %undef:gpr32, %bb.0
-...
-
----
-name: copy_to_dead
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_to_dead
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $wzr, $xzr
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $wzr
- ; CHECK-NEXT: dead [[COPY1:%[0-9]+]]:gpr64 = COPY $xzr
- ; CHECK-NEXT: TBZW killed [[COPY]], 0, %bb.2
- ; CHECK-NEXT: B %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[DEF:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: dead [[DEF1:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.2
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[DEF2:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: dead [[DEF3:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.1
- bb.0:
- liveins: $wzr, $xzr
-
- %9:gpr32 = COPY $wzr
- dead %5:gpr64 = COPY $xzr
- TBZW killed %9:gpr32, 0, %bb.2
- B %bb.1
-
- bb.1:
- successors: %bb.2(0x80000000); %bb.2(100.00%)
-
- dead %1:gpr64 = PHI undef %3:gpr64, %bb.2, undef %5:gpr64, %bb.0
- dead %2:gpr64 = PHI undef %4:gpr64, %bb.2, undef %5:gpr64, %bb.0
- B %bb.2
-
- bb.2:
- successors: %bb.1(0x80000000); %bb.1(100.00%)
-
- dead %3:gpr64 = PHI undef %1:gpr64, %bb.1, undef %5:gpr64, %bb.0
- dead %4:gpr64 = PHI undef %2:gpr64, %bb.1, undef %5:gpr64, %bb.0
- B %bb.1
-
-...
-
----
-name: update_livevars
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: update_livevars
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $w0, $w1, $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY killed $w0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY killed $w1
- ; CHECK-NEXT: B %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]]
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
- ; CHECK-NEXT: Bcc 1, %bb.1, implicit $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.1
- bb.0:
- successors: %bb.1
- liveins: $w0, $w1, $nzcv
-
- %0:gpr32 = COPY killed $w0
- %1:gpr32 = COPY killed $w1
- B %bb.1
-
- bb.1:
- successors: %bb.2, %bb.1
- liveins: $nzcv
-
- %2:gpr32 = PHI %3, %bb.2, %1, %bb.0, %3, %bb.1
- %3:gpr32 = COPY %0
- Bcc 1, %bb.1, implicit $nzcv
-
- bb.2:
- successors: %bb.1
- liveins: $nzcv
-
- B %bb.1
-...
-
----
-name: copy_subreg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_subreg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $x0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY killed $x0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY killed [[COPY]]
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]].sub_32
- bb.0:
- successors: %bb.1
- liveins: $x0
-
- %0:gpr64 = COPY killed $x0
- %1:gpr64 = COPY killed %0
-
- bb.1:
- %2:gpr32 = PHI %1.sub_32, %bb.0
-...
diff --git a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
index ca1052a769408..8655bb1292ef7 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
@@ -583,8 +583,8 @@ define i16 @red_mla_dup_ext_u8_s8_s16(ptr noalias nocapture noundef readonly %A,
; CHECK-SD-NEXT: mov w10, w2
; CHECK-SD-NEXT: b.hi .LBB5_4
; CHECK-SD-NEXT: // %bb.2:
-; CHECK-SD-NEXT: mov w8, wzr
; CHECK-SD-NEXT: mov x11, xzr
+; CHECK-SD-NEXT: mov w8, wzr
; CHECK-SD-NEXT: b .LBB5_7
; CHECK-SD-NEXT: .LBB5_3:
; CHECK-SD-NEXT: mov w8, wzr
diff --git a/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll b/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
index 9fd27edae3176..71e0250b36972 100644
--- a/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
+++ b/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
@@ -199,16 +199,16 @@ define i128 @test_rmw_add_128(ptr %dst) {
; NOLSE-NEXT: sub sp, sp, #48
; NOLSE-NEXT: .cfi_def_cfa_offset 48
; NOLSE-NEXT: str x0, [sp, #24] // 8-byte Folded Spill
-; NOLSE-NEXT: ldr x9, [x0, #8]
-; NOLSE-NEXT: ldr x8, [x0]
+; NOLSE-NEXT: ldr x8, [x0, #8]
+; NOLSE-NEXT: ldr x9, [x0]
; NOLSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
; NOLSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; NOLSE-NEXT: b .LBB4_1
; NOLSE-NEXT: .LBB4_1: // %atomicrmw.start
; NOLSE-NEXT: // =>This Loop Header: Depth=1
; NOLSE-NEXT: // Child Loop BB4_2 Depth 2
-; NOLSE-NEXT: ldr x13, [sp, #32] // 8-byte Folded Reload
-; NOLSE-NEXT: ldr x11, [sp, #40] // 8-byte Folded Reload
+; NOLSE-NEXT: ldr x13, [sp, #40] // 8-byte Folded Reload
+; NOLSE-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
; NOLSE-NEXT: ldr x9, [sp, #24] // 8-byte Folded Reload
; NOLSE-NEXT: adds x14, x11, #1
; NOLSE-NEXT: cinc x15, x13, hs
@@ -238,8 +238,8 @@ define i128 @test_rmw_add_128(ptr %dst) {
; NOLSE-NEXT: str x9, [sp, #16] // 8-byte Folded Spill
; NOLSE-NEXT: subs x12, x12, x13
; NOLSE-NEXT: ccmp x10, x11, #0, eq
-; NOLSE-NEXT: str x9, [sp, #40] // 8-byte Folded Spill
-; NOLSE-NEXT: str x8, [sp, #32] // 8-byte Folded Spill
+; NOLSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
+; NOLSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; NOLSE-NEXT: b.ne .LBB4_1
; NOLSE-NEXT: b .LBB4_6
; NOLSE-NEXT: .LBB4_6: // %atomicrmw.end
@@ -253,15 +253,15 @@ define i128 @test_rmw_add_128(ptr %dst) {
; LSE-NEXT: sub sp, sp, #48
; LSE-NEXT: .cfi_def_cfa_offset 48
; LSE-NEXT: str x0, [sp, #24] // 8-byte Folded Spill
-; LSE-NEXT: ldr x9, [x0, #8]
-; LSE-NEXT: ldr x8, [x0]
+; LSE-NEXT: ldr x8, [x0, #8]
+; LSE-NEXT: ldr x9, [x0]
; LSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
; LSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; LSE-NEXT: b .LBB4_1
; LSE-NEXT: .LBB4_1: // %atomicrmw.start
; LSE-NEXT: // =>This Inner Loop Header: Depth=1
-; LSE-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
-; LSE-NEXT: ldr x10, [sp, #40] // 8-byte Folded Reload
+; LSE-NEXT: ldr x11, [sp, #40] // 8-byte Folded Reload
+; LSE-NEXT: ldr x10, [sp, #32] // 8-byte Folded Reload
; LSE-NEXT: ldr x8, [sp, #24] // 8-byte Folded Reload
; LSE-NEXT: mov x0, x10
; LSE-NEXT: mov x1, x11
@@ -276,8 +276,8 @@ define i128 @test_rmw_add_128(ptr %dst) {
; LSE-NEXT: str x8, [sp, #16] // 8-byte Folded Spill
; LSE-NEXT: subs x11, x8, x11
; LSE-NEXT: ccmp x9, x10, #0, eq
-; LSE-NEXT: str x9, [sp, #40] // 8-byte Folded Spill
-; LSE-NEXT: str x8, [sp, #32] // 8-byte Folded Spill
+; LSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
+; LSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; LSE-NEXT: b.ne .LBB4_1
; LSE-NEXT: b .LBB4_2
; LSE-NEXT: .LBB4_2: // %atomicrmw.end
@@ -573,16 +573,16 @@ define i128 @test_rmw_nand_1...
[truncated]
|
|
@llvm/pr-subscribers-backend-hexagon Author: Guy David (guy-david) ChangesReverting because mis-compiles:
Patch is 7.38 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/146850.diff 142 Files Affected:
diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp
index 86523c22a419d..a93a89ecaa96e 100644
--- a/llvm/lib/CodeGen/PHIElimination.cpp
+++ b/llvm/lib/CodeGen/PHIElimination.cpp
@@ -581,20 +581,6 @@ void PHIEliminationImpl::LowerPHINode(MachineBasicBlock &MBB,
continue;
}
- // Reuse an existing copy in the block if possible.
- if (IncomingReg.isVirtual()) {
- MachineInstr *DefMI = MRI->getUniqueVRegDef(SrcReg);
- const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcReg);
- const TargetRegisterClass *IncomingRC = MRI->getRegClass(IncomingReg);
- if (DefMI && DefMI->isCopy() && DefMI->getParent() == &opBlock &&
- MRI->use_empty(SrcReg) && IncomingRC->hasSuperClassEq(SrcRC)) {
- DefMI->getOperand(0).setReg(IncomingReg);
- if (LV)
- LV->getVarInfo(SrcReg).AliveBlocks.clear();
- continue;
- }
- }
-
// Find a safe location to insert the copy, this may be the first terminator
// in the block (or end()).
MachineBasicBlock::iterator InsertPos =
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
index 6c300b04508b2..c1c5c53aa7df2 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
@@ -118,8 +118,8 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
; -O0: bl __aarch64_cas16_relax
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -131,8 +131,8 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
; -O0: bl __aarch64_cas16_relax
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -144,8 +144,8 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
; -O0: bl __aarch64_cas16_rel
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -157,8 +157,8 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
; -O0: bl __aarch64_cas16_acq_rel
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
index 2a7bbad9d6454..d1047d84e2956 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
@@ -117,13 +117,13 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -134,13 +134,13 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -151,13 +151,13 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -168,13 +168,13 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
-; -O0: ldaxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldaxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
index 493bc742f7663..1a79c73355143 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
@@ -117,13 +117,13 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -134,13 +134,13 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -151,13 +151,13 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -168,13 +168,13 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
-; -O0: ldaxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldaxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir b/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
index 993d1c1f1b5f0..01c44e3f253bb 100644
--- a/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
+++ b/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
@@ -37,7 +37,7 @@ body: |
bb.1:
%x:gpr32 = COPY $wzr
; Test that the debug location is not copied into bb1!
- ; CHECK: %3:gpr32 = COPY $wzr
+ ; CHECK: %3:gpr32 = COPY killed %x{{$}}
; CHECK-LABEL: bb.2:
bb.2:
%y:gpr32 = PHI %x:gpr32, %bb.1, undef %undef:gpr32, %bb.0, debug-location !14
diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir b/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir
deleted file mode 100644
index 20020a8ed3fb7..0000000000000
--- a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir
+++ /dev/null
@@ -1,193 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -run-pass=livevars,phi-node-elimination -verify-machineinstrs -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
-
-# Verify that the original COPY in bb.1 is reappropriated as the PHI source in bb.2,
-# instead of creating a new COPY with the same source register.
-
----
-name: copy_virtual_reg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_virtual_reg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv, $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:gpr32 = COPY killed $w0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed %a
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: %c:gpr32 = COPY killed [[DEF]]
- ; CHECK-NEXT: dead %d:gpr32 = COPY killed %c
- bb.0:
- liveins: $nzcv, $w0
- %a:gpr32 = COPY $w0
- Bcc 8, %bb.2, implicit $nzcv
- bb.1:
- %b:gpr32 = COPY %a:gpr32
- bb.2:
- %c:gpr32 = PHI %b:gpr32, %bb.1, undef %undef:gpr32, %bb.0
- %d:gpr32 = COPY %c:gpr32
-...
-
----
-name: copy_physical_reg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_physical_reg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv, $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead $x0 = IMPLICIT_DEF implicit-def $w0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: dead %b:gpr32 = COPY killed [[DEF]]
- bb.0:
- liveins: $nzcv, $w0
- Bcc 8, %bb.2, implicit $nzcv
- bb.1:
- $x0 = IMPLICIT_DEF
- %a:gpr32 = COPY $w0
- bb.2:
- %b:gpr32 = PHI %a:gpr32, %bb.1, undef %undef:gpr32, %bb.0
-...
-
----
-name: copy_to_dead
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_to_dead
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $wzr, $xzr
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $wzr
- ; CHECK-NEXT: dead [[COPY1:%[0-9]+]]:gpr64 = COPY $xzr
- ; CHECK-NEXT: TBZW killed [[COPY]], 0, %bb.2
- ; CHECK-NEXT: B %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[DEF:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: dead [[DEF1:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.2
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[DEF2:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: dead [[DEF3:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.1
- bb.0:
- liveins: $wzr, $xzr
-
- %9:gpr32 = COPY $wzr
- dead %5:gpr64 = COPY $xzr
- TBZW killed %9:gpr32, 0, %bb.2
- B %bb.1
-
- bb.1:
- successors: %bb.2(0x80000000); %bb.2(100.00%)
-
- dead %1:gpr64 = PHI undef %3:gpr64, %bb.2, undef %5:gpr64, %bb.0
- dead %2:gpr64 = PHI undef %4:gpr64, %bb.2, undef %5:gpr64, %bb.0
- B %bb.2
-
- bb.2:
- successors: %bb.1(0x80000000); %bb.1(100.00%)
-
- dead %3:gpr64 = PHI undef %1:gpr64, %bb.1, undef %5:gpr64, %bb.0
- dead %4:gpr64 = PHI undef %2:gpr64, %bb.1, undef %5:gpr64, %bb.0
- B %bb.1
-
-...
-
----
-name: update_livevars
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: update_livevars
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $w0, $w1, $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY killed $w0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY killed $w1
- ; CHECK-NEXT: B %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]]
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
- ; CHECK-NEXT: Bcc 1, %bb.1, implicit $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.1
- bb.0:
- successors: %bb.1
- liveins: $w0, $w1, $nzcv
-
- %0:gpr32 = COPY killed $w0
- %1:gpr32 = COPY killed $w1
- B %bb.1
-
- bb.1:
- successors: %bb.2, %bb.1
- liveins: $nzcv
-
- %2:gpr32 = PHI %3, %bb.2, %1, %bb.0, %3, %bb.1
- %3:gpr32 = COPY %0
- Bcc 1, %bb.1, implicit $nzcv
-
- bb.2:
- successors: %bb.1
- liveins: $nzcv
-
- B %bb.1
-...
-
----
-name: copy_subreg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_subreg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $x0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY killed $x0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY killed [[COPY]]
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]].sub_32
- bb.0:
- successors: %bb.1
- liveins: $x0
-
- %0:gpr64 = COPY killed $x0
- %1:gpr64 = COPY killed %0
-
- bb.1:
- %2:gpr32 = PHI %1.sub_32, %bb.0
-...
diff --git a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
index ca1052a769408..8655bb1292ef7 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
@@ -583,8 +583,8 @@ define i16 @red_mla_dup_ext_u8_s8_s16(ptr noalias nocapture noundef readonly %A,
; CHECK-SD-NEXT: mov w10, w2
; CHECK-SD-NEXT: b.hi .LBB5_4
; CHECK-SD-NEXT: // %bb.2:
-; CHECK-SD-NEXT: mov w8, wzr
; CHECK-SD-NEXT: mov x11, xzr
+; CHECK-SD-NEXT: mov w8, wzr
; CHECK-SD-NEXT: b .LBB5_7
; CHECK-SD-NEXT: .LBB5_3:
; CHECK-SD-NEXT: mov w8, wzr
diff --git a/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll b/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
index 9fd27edae3176..71e0250b36972 100644
--- a/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
+++ b/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
@@ -199,16 +199,16 @@ define i128 @test_rmw_add_128(ptr %dst) {
; NOLSE-NEXT: sub sp, sp, #48
; NOLSE-NEXT: .cfi_def_cfa_offset 48
; NOLSE-NEXT: str x0, [sp, #24] // 8-byte Folded Spill
-; NOLSE-NEXT: ldr x9, [x0, #8]
-; NOLSE-NEXT: ldr x8, [x0]
+; NOLSE-NEXT: ldr x8, [x0, #8]
+; NOLSE-NEXT: ldr x9, [x0]
; NOLSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
; NOLSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; NOLSE-NEXT: b .LBB4_1
; NOLSE-NEXT: .LBB4_1: // %atomicrmw.start
; NOLSE-NEXT: // =>This Loop Header: Depth=1
; NOLSE-NEXT: // Child Loop BB4_2 Depth 2
-; NOLSE-NEXT: ldr x13, [sp, #32] // 8-byte Folded Reload
-; NOLSE-NEXT: ldr x11, [sp, #40] // 8-byte Folded Reload
+; NOLSE-NEXT: ldr x13, [sp, #40] // 8-byte Folded Reload
+; NOLSE-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
; NOLSE-NEXT: ldr x9, [sp, #24] // 8-byte Folded Reload
; NOLSE-NEXT: adds x14, x11, #1
; NOLSE-NEXT: cinc x15, x13, hs
@@ -238,8 +238,8 @@ define i128 @test_rmw_add_128(ptr %dst) {
; NOLSE-NEXT: str x9, [sp, #16] // 8-byte Folded Spill
; NOLSE-NEXT: subs x12, x12, x13
; NOLSE-NEXT: ccmp x10, x11, #0, eq
-; NOLSE-NEXT: str x9, [sp, #40] // 8-byte Folded Spill
-; NOLSE-NEXT: str x8, [sp, #32] // 8-byte Folded Spill
+; NOLSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
+; NOLSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; NOLSE-NEXT: b.ne .LBB4_1
; NOLSE-NEXT: b .LBB4_6
; NOLSE-NEXT: .LBB4_6: // %atomicrmw.end
@@ -253,15 +253,15 @@ define i128 @test_rmw_add_128(ptr %dst) {
; LSE-NEXT: sub sp, sp, #48
; LSE-NEXT: .cfi_def_cfa_offset 48
; LSE-NEXT: str x0, [sp, #24] // 8-byte Folded Spill
-; LSE-NEXT: ldr x9, [x0, #8]
-; LSE-NEXT: ldr x8, [x0]
+; LSE-NEXT: ldr x8, [x0, #8]
+; LSE-NEXT: ldr x9, [x0]
; LSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
; LSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; LSE-NEXT: b .LBB4_1
; LSE-NEXT: .LBB4_1: // %atomicrmw.start
; LSE-NEXT: // =>This Inner Loop Header: Depth=1
-; LSE-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
-; LSE-NEXT: ldr x10, [sp, #40] // 8-byte Folded Reload
+; LSE-NEXT: ldr x11, [sp, #40] // 8-byte Folded Reload
+; LSE-NEXT: ldr x10, [sp, #32] // 8-byte Folded Reload
; LSE-NEXT: ldr x8, [sp, #24] // 8-byte Folded Reload
; LSE-NEXT: mov x0, x10
; LSE-NEXT: mov x1, x11
@@ -276,8 +276,8 @@ define i128 @test_rmw_add_128(ptr %dst) {
; LSE-NEXT: str x8, [sp, #16] // 8-byte Folded Spill
; LSE-NEXT: subs x11, x8, x11
; LSE-NEXT: ccmp x9, x10, #0, eq
-; LSE-NEXT: str x9, [sp, #40] // 8-byte Folded Spill
-; LSE-NEXT: str x8, [sp, #32] // 8-byte Folded Spill
+; LSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
+; LSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; LSE-NEXT: b.ne .LBB4_1
; LSE-NEXT: b .LBB4_2
; LSE-NEXT: .LBB4_2: // %atomicrmw.end
@@ -573,16 +573,16 @@ define i128 @test_rmw_nand_1...
[truncated]
|
|
@llvm/pr-subscribers-backend-arm Author: Guy David (guy-david) ChangesReverting because mis-compiles:
Patch is 7.38 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/146850.diff 142 Files Affected:
diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp
index 86523c22a419d..a93a89ecaa96e 100644
--- a/llvm/lib/CodeGen/PHIElimination.cpp
+++ b/llvm/lib/CodeGen/PHIElimination.cpp
@@ -581,20 +581,6 @@ void PHIEliminationImpl::LowerPHINode(MachineBasicBlock &MBB,
continue;
}
- // Reuse an existing copy in the block if possible.
- if (IncomingReg.isVirtual()) {
- MachineInstr *DefMI = MRI->getUniqueVRegDef(SrcReg);
- const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcReg);
- const TargetRegisterClass *IncomingRC = MRI->getRegClass(IncomingReg);
- if (DefMI && DefMI->isCopy() && DefMI->getParent() == &opBlock &&
- MRI->use_empty(SrcReg) && IncomingRC->hasSuperClassEq(SrcRC)) {
- DefMI->getOperand(0).setReg(IncomingReg);
- if (LV)
- LV->getVarInfo(SrcReg).AliveBlocks.clear();
- continue;
- }
- }
-
// Find a safe location to insert the copy, this may be the first terminator
// in the block (or end()).
MachineBasicBlock::iterator InsertPos =
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
index 6c300b04508b2..c1c5c53aa7df2 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-outline_atomics.ll
@@ -118,8 +118,8 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
; -O0: bl __aarch64_cas16_relax
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -131,8 +131,8 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
; -O0: bl __aarch64_cas16_relax
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -144,8 +144,8 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
; -O0: bl __aarch64_cas16_rel
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -157,8 +157,8 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
; -O0: bl __aarch64_cas16_acq_rel
-; -O0: subs x9, x0, x9
-; -O0: ccmp x1, x8, #0, eq
+; -O0: subs x10, x10, x11
+; -O0: ccmp x8, x9, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
index 2a7bbad9d6454..d1047d84e2956 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-rcpc.ll
@@ -117,13 +117,13 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -134,13 +134,13 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -151,13 +151,13 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -168,13 +168,13 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
-; -O0: ldaxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldaxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
index 493bc742f7663..1a79c73355143 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomic-store-v8a.ll
@@ -117,13 +117,13 @@ define dso_local void @store_atomic_i64_aligned_seq_cst(i64 %value, ptr %ptr) {
define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_unordered:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_unordered:
; -O1: ldxp xzr, x8, [x2]
@@ -134,13 +134,13 @@ define dso_local void @store_atomic_i128_aligned_unordered(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_monotonic:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stxp w12, x14, x15, [x13]
-; -O0: stxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stxp w8, x14, x15, [x9]
+; -O0: stxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_monotonic:
; -O1: ldxp xzr, x8, [x2]
@@ -151,13 +151,13 @@ define dso_local void @store_atomic_i128_aligned_monotonic(i128 %value, ptr %ptr
define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_release:
-; -O0: ldxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_release:
; -O1: ldxp xzr, x8, [x2]
@@ -168,13 +168,13 @@ define dso_local void @store_atomic_i128_aligned_release(i128 %value, ptr %ptr)
define dso_local void @store_atomic_i128_aligned_seq_cst(i128 %value, ptr %ptr) {
; -O0-LABEL: store_atomic_i128_aligned_seq_cst:
-; -O0: ldaxp x8, x10, [x13]
-; -O0: cmp x8, x9
+; -O0: ldaxp x10, x12, [x9]
; -O0: cmp x10, x11
-; -O0: stlxp w12, x14, x15, [x13]
-; -O0: stlxp w12, x8, x10, [x13]
-; -O0: subs x10, x10, x11
-; -O0: ccmp x8, x9, #0, eq
+; -O0: cmp x12, x13
+; -O0: stlxp w8, x14, x15, [x9]
+; -O0: stlxp w8, x10, x12, [x9]
+; -O0: subs x12, x12, x13
+; -O0: ccmp x10, x11, #0, eq
;
; -O1-LABEL: store_atomic_i128_aligned_seq_cst:
; -O1: ldaxp xzr, x8, [x2]
diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir b/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
index 993d1c1f1b5f0..01c44e3f253bb 100644
--- a/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
+++ b/llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
@@ -37,7 +37,7 @@ body: |
bb.1:
%x:gpr32 = COPY $wzr
; Test that the debug location is not copied into bb1!
- ; CHECK: %3:gpr32 = COPY $wzr
+ ; CHECK: %3:gpr32 = COPY killed %x{{$}}
; CHECK-LABEL: bb.2:
bb.2:
%y:gpr32 = PHI %x:gpr32, %bb.1, undef %undef:gpr32, %bb.0, debug-location !14
diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir b/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir
deleted file mode 100644
index 20020a8ed3fb7..0000000000000
--- a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir
+++ /dev/null
@@ -1,193 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -run-pass=livevars,phi-node-elimination -verify-machineinstrs -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
-
-# Verify that the original COPY in bb.1 is reappropriated as the PHI source in bb.2,
-# instead of creating a new COPY with the same source register.
-
----
-name: copy_virtual_reg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_virtual_reg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv, $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: %a:gpr32 = COPY killed $w0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed %a
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: %c:gpr32 = COPY killed [[DEF]]
- ; CHECK-NEXT: dead %d:gpr32 = COPY killed %c
- bb.0:
- liveins: $nzcv, $w0
- %a:gpr32 = COPY $w0
- Bcc 8, %bb.2, implicit $nzcv
- bb.1:
- %b:gpr32 = COPY %a:gpr32
- bb.2:
- %c:gpr32 = PHI %b:gpr32, %bb.1, undef %undef:gpr32, %bb.0
- %d:gpr32 = COPY %c:gpr32
-...
-
----
-name: copy_physical_reg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_physical_reg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv, $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead $x0 = IMPLICIT_DEF implicit-def $w0
- ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed $w0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: dead %b:gpr32 = COPY killed [[DEF]]
- bb.0:
- liveins: $nzcv, $w0
- Bcc 8, %bb.2, implicit $nzcv
- bb.1:
- $x0 = IMPLICIT_DEF
- %a:gpr32 = COPY $w0
- bb.2:
- %b:gpr32 = PHI %a:gpr32, %bb.1, undef %undef:gpr32, %bb.0
-...
-
----
-name: copy_to_dead
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_to_dead
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $wzr, $xzr
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $wzr
- ; CHECK-NEXT: dead [[COPY1:%[0-9]+]]:gpr64 = COPY $xzr
- ; CHECK-NEXT: TBZW killed [[COPY]], 0, %bb.2
- ; CHECK-NEXT: B %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[DEF:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: dead [[DEF1:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.2
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[DEF2:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: dead [[DEF3:%[0-9]+]]:gpr64 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.1
- bb.0:
- liveins: $wzr, $xzr
-
- %9:gpr32 = COPY $wzr
- dead %5:gpr64 = COPY $xzr
- TBZW killed %9:gpr32, 0, %bb.2
- B %bb.1
-
- bb.1:
- successors: %bb.2(0x80000000); %bb.2(100.00%)
-
- dead %1:gpr64 = PHI undef %3:gpr64, %bb.2, undef %5:gpr64, %bb.0
- dead %2:gpr64 = PHI undef %4:gpr64, %bb.2, undef %5:gpr64, %bb.0
- B %bb.2
-
- bb.2:
- successors: %bb.1(0x80000000); %bb.1(100.00%)
-
- dead %3:gpr64 = PHI undef %1:gpr64, %bb.1, undef %5:gpr64, %bb.0
- dead %4:gpr64 = PHI undef %2:gpr64, %bb.1, undef %5:gpr64, %bb.0
- B %bb.1
-
-...
-
----
-name: update_livevars
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: update_livevars
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $w0, $w1, $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY killed $w0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY killed $w1
- ; CHECK-NEXT: B %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
- ; CHECK-NEXT: liveins: $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]]
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
- ; CHECK-NEXT: Bcc 1, %bb.1, implicit $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $nzcv
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = IMPLICIT_DEF
- ; CHECK-NEXT: B %bb.1
- bb.0:
- successors: %bb.1
- liveins: $w0, $w1, $nzcv
-
- %0:gpr32 = COPY killed $w0
- %1:gpr32 = COPY killed $w1
- B %bb.1
-
- bb.1:
- successors: %bb.2, %bb.1
- liveins: $nzcv
-
- %2:gpr32 = PHI %3, %bb.2, %1, %bb.0, %3, %bb.1
- %3:gpr32 = COPY %0
- Bcc 1, %bb.1, implicit $nzcv
-
- bb.2:
- successors: %bb.1
- liveins: $nzcv
-
- B %bb.1
-...
-
----
-name: copy_subreg
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: copy_subreg
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $x0
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY killed $x0
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY killed [[COPY]]
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]].sub_32
- bb.0:
- successors: %bb.1
- liveins: $x0
-
- %0:gpr64 = COPY killed $x0
- %1:gpr64 = COPY killed %0
-
- bb.1:
- %2:gpr32 = PHI %1.sub_32, %bb.0
-...
diff --git a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
index ca1052a769408..8655bb1292ef7 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
@@ -583,8 +583,8 @@ define i16 @red_mla_dup_ext_u8_s8_s16(ptr noalias nocapture noundef readonly %A,
; CHECK-SD-NEXT: mov w10, w2
; CHECK-SD-NEXT: b.hi .LBB5_4
; CHECK-SD-NEXT: // %bb.2:
-; CHECK-SD-NEXT: mov w8, wzr
; CHECK-SD-NEXT: mov x11, xzr
+; CHECK-SD-NEXT: mov w8, wzr
; CHECK-SD-NEXT: b .LBB5_7
; CHECK-SD-NEXT: .LBB5_3:
; CHECK-SD-NEXT: mov w8, wzr
diff --git a/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll b/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
index 9fd27edae3176..71e0250b36972 100644
--- a/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
+++ b/llvm/test/CodeGen/AArch64/atomicrmw-O0.ll
@@ -199,16 +199,16 @@ define i128 @test_rmw_add_128(ptr %dst) {
; NOLSE-NEXT: sub sp, sp, #48
; NOLSE-NEXT: .cfi_def_cfa_offset 48
; NOLSE-NEXT: str x0, [sp, #24] // 8-byte Folded Spill
-; NOLSE-NEXT: ldr x9, [x0, #8]
-; NOLSE-NEXT: ldr x8, [x0]
+; NOLSE-NEXT: ldr x8, [x0, #8]
+; NOLSE-NEXT: ldr x9, [x0]
; NOLSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
; NOLSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; NOLSE-NEXT: b .LBB4_1
; NOLSE-NEXT: .LBB4_1: // %atomicrmw.start
; NOLSE-NEXT: // =>This Loop Header: Depth=1
; NOLSE-NEXT: // Child Loop BB4_2 Depth 2
-; NOLSE-NEXT: ldr x13, [sp, #32] // 8-byte Folded Reload
-; NOLSE-NEXT: ldr x11, [sp, #40] // 8-byte Folded Reload
+; NOLSE-NEXT: ldr x13, [sp, #40] // 8-byte Folded Reload
+; NOLSE-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
; NOLSE-NEXT: ldr x9, [sp, #24] // 8-byte Folded Reload
; NOLSE-NEXT: adds x14, x11, #1
; NOLSE-NEXT: cinc x15, x13, hs
@@ -238,8 +238,8 @@ define i128 @test_rmw_add_128(ptr %dst) {
; NOLSE-NEXT: str x9, [sp, #16] // 8-byte Folded Spill
; NOLSE-NEXT: subs x12, x12, x13
; NOLSE-NEXT: ccmp x10, x11, #0, eq
-; NOLSE-NEXT: str x9, [sp, #40] // 8-byte Folded Spill
-; NOLSE-NEXT: str x8, [sp, #32] // 8-byte Folded Spill
+; NOLSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
+; NOLSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; NOLSE-NEXT: b.ne .LBB4_1
; NOLSE-NEXT: b .LBB4_6
; NOLSE-NEXT: .LBB4_6: // %atomicrmw.end
@@ -253,15 +253,15 @@ define i128 @test_rmw_add_128(ptr %dst) {
; LSE-NEXT: sub sp, sp, #48
; LSE-NEXT: .cfi_def_cfa_offset 48
; LSE-NEXT: str x0, [sp, #24] // 8-byte Folded Spill
-; LSE-NEXT: ldr x9, [x0, #8]
-; LSE-NEXT: ldr x8, [x0]
+; LSE-NEXT: ldr x8, [x0, #8]
+; LSE-NEXT: ldr x9, [x0]
; LSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
; LSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; LSE-NEXT: b .LBB4_1
; LSE-NEXT: .LBB4_1: // %atomicrmw.start
; LSE-NEXT: // =>This Inner Loop Header: Depth=1
-; LSE-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
-; LSE-NEXT: ldr x10, [sp, #40] // 8-byte Folded Reload
+; LSE-NEXT: ldr x11, [sp, #40] // 8-byte Folded Reload
+; LSE-NEXT: ldr x10, [sp, #32] // 8-byte Folded Reload
; LSE-NEXT: ldr x8, [sp, #24] // 8-byte Folded Reload
; LSE-NEXT: mov x0, x10
; LSE-NEXT: mov x1, x11
@@ -276,8 +276,8 @@ define i128 @test_rmw_add_128(ptr %dst) {
; LSE-NEXT: str x8, [sp, #16] // 8-byte Folded Spill
; LSE-NEXT: subs x11, x8, x11
; LSE-NEXT: ccmp x9, x10, #0, eq
-; LSE-NEXT: str x9, [sp, #40] // 8-byte Folded Spill
-; LSE-NEXT: str x8, [sp, #32] // 8-byte Folded Spill
+; LSE-NEXT: str x9, [sp, #32] // 8-byte Folded Spill
+; LSE-NEXT: str x8, [sp, #40] // 8-byte Folded Spill
; LSE-NEXT: b.ne .LBB4_1
; LSE-NEXT: b .LBB4_2
; LSE-NEXT: .LBB4_2: // %atomicrmw.end
@@ -573,16 +573,16 @@ define i128 @test_rmw_nand_1...
[truncated]
|
|
thanks for reverts |
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/175/builds/21489 Here is the relevant piece of the build log for the reference |
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/137/builds/21552 Here is the relevant piece of the build log for the reference |
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Reverting because mis-compiles: