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[bolt][aarch64] Add load-acquire & store-release instructions #146035

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@yavtuk yavtuk commented Jun 27, 2025

This patch adds checking for the load-acquire & store-release instructions since a operand can be SP register.

This patch adds checking for the load-acquire & store-release
instructions since a operand can be SP register.
@llvmbot
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llvmbot commented Jun 27, 2025

@llvm/pr-subscribers-bolt

Author: Alexey Moksyakov (yavtuk)

Changes

This patch adds checking for the load-acquire & store-release instructions since a operand can be SP register.


Full diff: https://github.com/llvm/llvm-project/pull/146035.diff

1 Files Affected:

  • (modified) bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp (+19-1)
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index 612c1304efd60..491311716450b 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -661,6 +661,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
     case AArch64::LDTRBi:
     case AArch64::LDTRSBWi:
     case AArch64::LDTRSBXi:
+    case AArch64::LDARB:
       return true;
     default:
       break;
@@ -699,6 +700,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
     case AArch64::LDTRHi:
     case AArch64::LDTRSHWi:
     case AArch64::LDTRSHXi:
+    case AArch64::LDARH:
       return true;
     default:
       break;
@@ -733,6 +735,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
     case AArch64::LDPSWpost:
     case AArch64::LDPSWpre:
     case AArch64::LDNPWi:
+    case AArch64::LDARW:
       return true;
     default:
       break;
@@ -756,6 +759,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
     case AArch64::LDPXi:
     case AArch64::LDPXpost:
     case AArch64::LDPXpre:
+    case AArch64::LDARX:
       return true;
     default:
       break;
@@ -1926,9 +1930,23 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
       return false;
     };
 
+    auto isStoreRelease = [&]() {
+      switch (opcode) {
+      case AArch64::STLRB:
+      case AArch64::STLRH:
+      case AArch64::STLRW:
+      case AArch64::STLRX:
+        return true;
+      default:
+        break;
+      }
+
+      return false;
+    };
+
     return isStoreRegUnscaleImm() || isStoreRegScaledImm() ||
            isStoreRegImmPreIndexed() || isStoreRegImmPostIndexed() ||
-           isStoreRegUnscaleUnpriv() || isStoreRegTrunc();
+           isStoreRegUnscaleUnpriv() || isStoreRegTrunc() || isStoreRelease();
   }
 
   bool mayStore(const MCInst &Inst) const override {

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Looks good! Thanks for the addition Alexei.
Do you have a small lit test to accompany the patch?

For additions like this, unittests might be easy to add; not sure what others think?

@yavtuk
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yavtuk commented Jun 27, 2025

I can try to add if you think it will be helpful

@yota9
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yota9 commented Jun 27, 2025

Hi, maybe add ldaex/stlex too?

@yavtuk
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yavtuk commented Jun 27, 2025

Hi, maybe add ldaex/stlex too?

Let me check, why not, thanks

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4 participants