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[SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (part 1) #143102

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[SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (part 1) #143102

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65 changes: 52 additions & 13 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -23182,6 +23182,7 @@ SDValue DAGCombiner::visitINSERT_VECTOR_ELT(SDNode *N) {
auto *IndexC = dyn_cast<ConstantSDNode>(EltNo);

// Insert into out-of-bounds element is undefined.
// Code below relies on that we handle this special case early.
if (IndexC && VT.isFixedLengthVector() &&
IndexC->getZExtValue() >= VT.getVectorNumElements())
return DAG.getUNDEF(VT);
Expand All @@ -23192,14 +23193,28 @@ SDValue DAGCombiner::visitINSERT_VECTOR_ELT(SDNode *N) {
InVec == InVal.getOperand(0) && EltNo == InVal.getOperand(1))
return InVec;

if (!IndexC) {
// If this is variable insert to undef vector, it might be better to splat:
// inselt undef, InVal, EltNo --> build_vector < InVal, InVal, ... >
if (InVec.isUndef() && TLI.shouldSplatInsEltVarIndex(VT))
return DAG.getSplat(VT, DL, InVal);
return SDValue();
// If this is variable insert to undef vector, it might be better to splat:
// inselt undef, InVal, EltNo --> build_vector < InVal, InVal, ... >
if (!IndexC && InVec.isUndef() && TLI.shouldSplatInsEltVarIndex(VT))
return DAG.getSplat(VT, DL, InVal);

// Try to drop insert of UNDEF/POISON elements. This is also done in getNode,
// but we also do it as a DAG combine since for example simplifications into
// SPLAT_VECTOR/BUILD_VECTOR may turn poison elements into undef/zero etc, and
// then suddenly the InVec is guaranteed to not be poison.
if (InVal.isUndef()) {
if (IndexC && VT.isFixedLengthVector()) {
APInt EltMask = APInt::getOneBitSet(VT.getVectorNumElements(),
IndexC->getZExtValue());
if (DAG.isGuaranteedNotToBePoison(InVec, EltMask))
return InVec;
}
return DAG.getFreeze(InVec);
}

if (!IndexC)
return SDValue();

if (VT.isScalableVector())
return SDValue();

Expand Down Expand Up @@ -27639,18 +27654,42 @@ SDValue DAGCombiner::visitINSERT_SUBVECTOR(SDNode *N) {
SDValue N2 = N->getOperand(2);
uint64_t InsIdx = N->getConstantOperandVal(2);

// If inserting an UNDEF, just return the original vector.
if (N1.isUndef())
return N0;
// If inserting an UNDEF, just return the original vector (unless it makes the
// result more poisonous).
if (N1.isUndef()) {
if (N1.getOpcode() == ISD::POISON)
return N0;
if (VT.isFixedLengthVector()) {
unsigned SubVecNumElts = N1.getValueType().getVectorNumElements();
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(), InsIdx,
InsIdx + SubVecNumElts);
if (DAG.isGuaranteedNotToBePoison(N0, EltMask))
return N0;
}
return DAG.getFreeze(N0);
}

// If this is an insert of an extracted vector into an undef vector, we can
// just use the input to the extract if the types match, and can simplify
// If this is an insert of an extracted vector into an undef/poison vector, we
// can just use the input to the extract if the types match, and can simplify
// in some cases even if they don't.
if (N0.isUndef() && N1.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
N1.getOperand(1) == N2) {
EVT N1VT = N1.getValueType();
EVT SrcVT = N1.getOperand(0).getValueType();
if (SrcVT == VT)
return N1.getOperand(0);
if (SrcVT == VT) {
// Need to ensure that result isn't more poisonous if skipping both the
// extract+insert.
if (N0.getOpcode() == ISD::POISON)
return N1.getOperand(0);
if (VT.isFixedLengthVector() && N1VT.isFixedLengthVector()) {
unsigned SubVecNumElts = N1VT.getVectorNumElements();
APInt EltMask = APInt::getBitsSet(VT.getVectorNumElements(), InsIdx,
InsIdx + SubVecNumElts);
if (DAG.isGuaranteedNotToBePoison(N1.getOperand(0), ~EltMask))
return N1.getOperand(0);
} else if (DAG.isGuaranteedNotToBePoison(N1.getOperand(0)))
return N1.getOperand(0);
}
// TODO: To remove the zero check, need to adjust the offset to
// a multiple of the new src type.
if (isNullConstant(N2)) {
Expand Down
65 changes: 55 additions & 10 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -7952,23 +7952,42 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
// INSERT_VECTOR_ELT into out-of-bounds element is an UNDEF, except
// for scalable vectors where we will generate appropriate code to
// deal with out-of-bounds cases correctly.
if (N3C && N1.getValueType().isFixedLengthVector() &&
N3C->getZExtValue() >= N1.getValueType().getVectorNumElements())
if (N3C && VT.isFixedLengthVector() &&
N3C->getZExtValue() >= VT.getVectorNumElements())
return getUNDEF(VT);

// Undefined index can be assumed out-of-bounds, so that's UNDEF too.
if (N3.isUndef())
return getUNDEF(VT);

// If the inserted element is an UNDEF, just use the input vector.
if (N2.isUndef())
// If inserting poison, just use the input vector.
if (N2.getOpcode() == ISD::POISON)
return N1;

// Inserting undef into undef/poison is still undef.
if (N2.getOpcode() == ISD::UNDEF && N1.isUndef())
return getUNDEF(VT);

// If the inserted element is an UNDEF, just use the input vector.
// But not if skipping the insert could make the result more poisonous.
if (N2.isUndef()) {
if (N3C && VT.isFixedLengthVector()) {
APInt EltMask =
APInt::getOneBitSet(VT.getVectorNumElements(), N3C->getZExtValue());
if (isGuaranteedNotToBePoison(N1, EltMask))
return N1;
} else if (isGuaranteedNotToBePoison(N1))
return N1;
}
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How many regressions do we get it we drop all this from getNode() and just leave the combine to do it?

We've often ended up doing more then basic canonicalisation in getNode() just to avoid one specific test regression.....

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We can remove the things releated to isGuaranteedNotToBePoison from INSERT_VECTOR_ELT and INSERT_SUBVECTOR in getNode without any diffs, if doing it after the changes I propose in "part 2" and "part 3". If doing it directly in this patch there is around 20 lit tests impacted.

break;
}
case ISD::INSERT_SUBVECTOR: {
// Inserting undef into undef is still undef.
if (N1.isUndef() && N2.isUndef())
// If inserting poison, just use the input vector,
if (N2.getOpcode() == ISD::POISON)
return N1;

// Inserting undef into undef/poison is still undef.
if (N2.getOpcode() == ISD::UNDEF && N1.isUndef())
return getUNDEF(VT);

EVT N2VT = N2.getValueType();
Expand Down Expand Up @@ -7997,11 +8016,37 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
if (VT == N2VT)
return N2;

// If this is an insert of an extracted vector into an undef vector, we
// can just use the input to the extract.
// If this is an insert of an extracted vector into an undef/poison vector,
// we can just use the input to the extract. But not if skipping the
// extract+insert could make the result more poisonous.
if (N1.isUndef() && N2.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
N2.getOperand(1) == N3 && N2.getOperand(0).getValueType() == VT)
return N2.getOperand(0);
N2.getOperand(1) == N3 && N2.getOperand(0).getValueType() == VT) {
if (N1.getOpcode() == ISD::POISON)
return N2.getOperand(0);
if (VT.isFixedLengthVector() && N2VT.isFixedLengthVector()) {
unsigned LoBit = N3->getAsZExtVal();
unsigned HiBit = LoBit + N2VT.getVectorNumElements();
APInt EltMask =
APInt::getBitsSet(VT.getVectorNumElements(), LoBit, HiBit);
if (isGuaranteedNotToBePoison(N2.getOperand(0), ~EltMask))
return N2.getOperand(0);
} else if (isGuaranteedNotToBePoison(N2.getOperand(0)))
return N2.getOperand(0);
}

// If the inserted subvector is UNDEF, just use the input vector.
// But not if skipping the insert could make the result more poisonous.
if (N2.isUndef()) {
if (VT.isFixedLengthVector()) {
unsigned LoBit = N3->getAsZExtVal();
unsigned HiBit = LoBit + N2VT.getVectorNumElements();
APInt EltMask =
APInt::getBitsSet(VT.getVectorNumElements(), LoBit, HiBit);
if (isGuaranteedNotToBePoison(N1, EltMask))
return N1;
} else if (isGuaranteedNotToBePoison(N1))
return N1;
}
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again - are we doing too much in getNode at this stage?

break;
}
case ISD::BITCAST:
Expand Down
8 changes: 6 additions & 2 deletions llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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Expand Up @@ -3433,8 +3433,8 @@ bool TargetLowering::SimplifyDemandedVectorElts(
break;
}
case ISD::INSERT_SUBVECTOR: {
// Demand any elements from the subvector and the remainder from the src its
// inserted into.
// Demand any elements from the subvector and the remainder from the src it
// is inserted into.
SDValue Src = Op.getOperand(0);
SDValue Sub = Op.getOperand(1);
uint64_t Idx = Op.getConstantOperandVal(2);
Expand All @@ -3443,6 +3443,10 @@ bool TargetLowering::SimplifyDemandedVectorElts(
APInt DemandedSrcElts = DemandedElts;
DemandedSrcElts.clearBits(Idx, Idx + NumSubElts);

// If none of the sub operand elements are demanded, bypass the insert.
if (!DemandedSubElts)
return TLO.CombineTo(Op, Src);

APInt SubUndef, SubZero;
if (SimplifyDemandedVectorElts(Sub, DemandedSubElts, SubUndef, SubZero, TLO,
Depth + 1))
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/arm64-build-vector.ll
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Expand Up @@ -57,8 +57,8 @@ define void @widen_f16_build_vector(ptr %addr) {
; CHECK-LABEL: widen_f16_build_vector:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #13294 // =0x33ee
; CHECK-NEXT: movk w8, #13294, lsl #16
; CHECK-NEXT: str w8, [x0]
; CHECK-NEXT: dup v0.4h, w8
; CHECK-NEXT: str s0, [x0]
; CHECK-NEXT: ret
store <2 x half> <half 0xH33EE, half 0xH33EE>, ptr %addr, align 2
ret void
Expand Down
12 changes: 5 additions & 7 deletions llvm/test/CodeGen/AArch64/concat-vector-add-combine.ll
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Expand Up @@ -94,16 +94,14 @@ define i32 @combine_undef_add_8xi32(i32 %a, i32 %b, i32 %c, i32 %d) local_unname
; CHECK-LABEL: combine_undef_add_8xi32:
; CHECK: // %bb.0:
; CHECK-NEXT: fmov s1, w0
; CHECK-NEXT: movi v0.2d, #0000000000000000
; CHECK-NEXT: dup v0.4s, w8
; CHECK-NEXT: mov v1.s[1], w1
; CHECK-NEXT: uhadd v0.4h, v0.4h, v0.4h
; CHECK-NEXT: mov v1.s[2], w2
; CHECK-NEXT: mov v1.s[3], w3
; CHECK-NEXT: xtn v2.4h, v1.4s
; CHECK-NEXT: shrn v1.4h, v1.4s, #16
; CHECK-NEXT: uhadd v1.4h, v2.4h, v1.4h
; CHECK-NEXT: mov v1.d[1], v0.d[0]
; CHECK-NEXT: uaddlv s0, v1.8h
; CHECK-NEXT: uzp2 v2.8h, v1.8h, v0.8h
; CHECK-NEXT: uzp1 v0.8h, v1.8h, v0.8h
; CHECK-NEXT: uhadd v0.8h, v0.8h, v2.8h
; CHECK-NEXT: uaddlv s0, v0.8h
; CHECK-NEXT: fmov w0, s0
; CHECK-NEXT: ret
%a1 = insertelement <8 x i32> poison, i32 %a, i32 0
Expand Down
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