[RTG] Add context resource attribute interface

maerhart · maerhart · commit d439b8cf7f4c · 2025-01-06T14:02:13.000+01:00
diff --git a/include/circt/Dialect/RTG/IR/CMakeLists.txt b/include/circt/Dialect/RTG/IR/CMakeLists.txt
@@ -18,6 +18,11 @@ mlir_tablegen(RTGTypeInterfaces.cpp.inc -gen-type-interface-defs)
 add_public_tablegen_target(CIRCTRTGTypeInterfacesIncGen)
 add_dependencies(circt-headers CIRCTRTGTypeInterfacesIncGen)
 
+mlir_tablegen(RTGAttrInterfaces.h.inc -gen-attr-interface-decls)
+mlir_tablegen(RTGAttrInterfaces.cpp.inc -gen-attr-interface-defs)
+add_public_tablegen_target(CIRCTRTGAttrInterfacesIncGen)
+add_dependencies(circt-headers CIRCTRTGAttrInterfacesIncGen)
+
 set(LLVM_TARGET_DEFINITIONS RTGISAAssemblyInterfaces.td)
 mlir_tablegen(RTGISAAssemblyOpInterfaces.h.inc -gen-op-interface-decls)
 mlir_tablegen(RTGISAAssemblyOpInterfaces.cpp.inc -gen-op-interface-defs)
diff --git a/include/circt/Dialect/RTG/IR/RTGAttrInterfaces.h b/include/circt/Dialect/RTG/IR/RTGAttrInterfaces.h
@@ -0,0 +1,22 @@
+//===- RTGAttrInterfaces.h - Declare RTG attr interfaces --------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares attr interfaces for the RTG Dialect.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef CIRCT_DIALECT_RTG_IR_RTGATTRINTERFACES_H
+#define CIRCT_DIALECT_RTG_IR_RTGATTRINTERFACES_H
+
+#include "circt/Support/LLVM.h"
+#include "mlir/IR/Attributes.h"
+#include "mlir/IR/BuiltinAttributeInterfaces.h"
+
+#include "circt/Dialect/RTG/IR/RTGAttrInterfaces.h.inc"
+
+#endif // CIRCT_DIALECT_RTG_IR_RTGATTRINTERFACES_H
diff --git a/include/circt/Dialect/RTG/IR/RTGInterfaces.td b/include/circt/Dialect/RTG/IR/RTGInterfaces.td
@@ -11,6 +11,7 @@
 
 include "mlir/IR/Interfaces.td"
 include "mlir/IR/OpBase.td"
+include "mlir/IR/BuiltinAttributeInterfaces.td"
 
 def ContextResourceOpInterface : OpInterface<"ContextResourceOpInterface"> {
   let description = [{
@@ -50,4 +51,18 @@ def ContextResourceTypeInterface : TypeInterface<
   let cppNamespace = "::circt::rtg";
 }
 
+def ContextResourceAttrInterface : AttrInterface<
+    "ContextResourceAttrInterface", [TypedAttrInterface]> {
+  let description = [{
+    This interface should be implemented by attributes that represent context
+    resources.
+    Any attribute implementing this interface must be of a type implementing
+    the `ContextResourceTypeInterface`.
+
+    TODO: properly verify this; unfortunately, we don't have a 'verify' field
+    here like the 'OpInterface' has.
+  }];
+  let cppNamespace = "::circt::rtg";
+}
+
 #endif // CIRCT_DIALECT_RTG_IR_RTGINTERFACES_TD
diff --git a/include/circt/Dialect/RTG/IR/RTGOps.h b/include/circt/Dialect/RTG/IR/RTGOps.h
@@ -13,6 +13,7 @@
 #ifndef CIRCT_DIALECT_RTG_IR_RTGOPS_H
 #define CIRCT_DIALECT_RTG_IR_RTGOPS_H
 
+#include "circt/Dialect/RTG/IR/RTGAttrInterfaces.h"
 #include "circt/Dialect/RTG/IR/RTGDialect.h"
 #include "circt/Dialect/RTG/IR/RTGTypeInterfaces.h"
 #include "circt/Dialect/RTG/IR/RTGTypes.h"
diff --git a/include/circt/Dialect/RTGTest/IR/CMakeLists.txt b/include/circt/Dialect/RTGTest/IR/CMakeLists.txt
@@ -8,3 +8,7 @@ set(LLVM_TARGET_DEFINITIONS RTGTestAttributes.td)
 mlir_tablegen(RTGTestEnums.h.inc -gen-enum-decls)
 mlir_tablegen(RTGTestEnums.cpp.inc -gen-enum-defs)
 add_public_tablegen_target(CIRCTRTGTestEnumsIncGen)
+
+mlir_tablegen(RTGTestAttributes.h.inc -gen-attrdef-decls)
+mlir_tablegen(RTGTestAttributes.cpp.inc -gen-attrdef-defs)
+add_public_tablegen_target(CIRCTRTGTestAttributeIncGen)
diff --git a/include/circt/Dialect/RTGTest/IR/RTGTest.td b/include/circt/Dialect/RTGTest/IR/RTGTest.td
@@ -22,6 +22,7 @@ include "circt/Dialect/RTG/IR/RTGInterfaces.td"
 include "circt/Dialect/RTGTest/IR/RTGTestDialect.td"
 include "circt/Dialect/RTGTest/IR/RTGTestAttributes.td"
 include "circt/Dialect/RTGTest/IR/RTGTestTypes.td"
+include "circt/Dialect/RTGTest/IR/RTGTestAttributes.td"
 include "circt/Dialect/RTGTest/IR/RTGTestOps.td"
 
 #endif // CIRCT_DIALECT_RTGTEST_IR_RTGTEST_TD
diff --git a/include/circt/Dialect/RTGTest/IR/RTGTestAttributes.h b/include/circt/Dialect/RTGTest/IR/RTGTestAttributes.h
@@ -0,0 +1,21 @@
+//===- RTGTestAttributes.h - RTG Test dialect attributes --------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef CIRCT_DIALECT_RTGTEST_IR_RTGTESTATTRIBUTES_H
+#define CIRCT_DIALECT_RTGTEST_IR_RTGTESTATTRIBUTES_H
+
+#include "circt/Dialect/RTGTest/IR/RTGTestTypes.h"
+#include "mlir/IR/Attributes.h"
+#include "mlir/IR/BuiltinAttributes.h"
+
+#include "circt/Dialect/RTG/IR/RTGAttrInterfaces.h"
+
+#define GET_ATTRDEF_CLASSES
+#include "circt/Dialect/RTGTest/IR/RTGTestAttributes.h.inc"
+
+#endif // CIRCT_DIALECT_RTGTEST_IR_RTGTESTATTRIBUTES_H
diff --git a/include/circt/Dialect/RTGTest/IR/RTGTestAttributes.td b/include/circt/Dialect/RTGTest/IR/RTGTestAttributes.td
@@ -13,6 +13,8 @@
 #ifndef CIRCT_DIALECT_RTGTEST_IR_RTGTESTATTRIBUTES_TD
 #define CIRCT_DIALECT_RTGTEST_IR_RTGTESTATTRIBUTES_TD
 
+include "circt/Dialect/RTGTest/IR/RTGTestDialect.td"
+include "circt/Dialect/RTG/IR/RTGInterfaces.td"
 include "mlir/IR/AttrTypeBase.td"
 include "mlir/IR/EnumAttr.td"
 
@@ -57,4 +59,21 @@ def RegisterAttr : I32EnumAttr<
   let cppNamespace = "::circt::rtgtest";
 }
 
+class RTGTestAttrDef<string name, list<Trait> traits = []> 
+  : AttrDef<RTGTestDialect, name, traits>;
+
+def CPUAttr : RTGTestAttrDef<"CPU", [ContextResourceAttrInterface]> {
+  let summary = "this attribute represents a CPU referred to by the core ID";
+
+  let parameters = (ins "size_t":$id);
+
+  let mnemonic = "cpu";
+  let assemblyFormat = "`<` $id `>`";
+
+  let extraClassDeclaration = [{
+    // TypedAttrInterface
+    Type getType() const;
+  }];
+}
+
 #endif // CIRCT_DIALECT_RTGTEST_IR_RTGTESTATTRIBUTES_TD
diff --git a/include/circt/Dialect/RTGTest/IR/RTGTestDialect.td b/include/circt/Dialect/RTGTest/IR/RTGTestDialect.td
@@ -26,9 +26,11 @@ def RTGTestDialect : Dialect {
   }];
 
   let useDefaultTypePrinterParser = 1;
+  let useDefaultAttributePrinterParser = 1;
   let cppNamespace = "::circt::rtgtest";
 
   let extraClassDeclaration = [{
+    void registerAttributes();
     void registerTypes();
   }];
 }
diff --git a/include/circt/Dialect/RTGTest/IR/RTGTestOps.h b/include/circt/Dialect/RTGTest/IR/RTGTestOps.h
@@ -16,6 +16,7 @@
 #include "circt/Dialect/RTG/IR/RTGISAAssemblyOpInterfaces.h"
 #include "circt/Dialect/RTG/IR/RTGOpInterfaces.h"
 #include "circt/Dialect/RTG/IR/RTGOps.h"
+#include "circt/Dialect/RTGTest/IR/RTGTestAttributes.h"
 #include "circt/Dialect/RTGTest/IR/RTGTestDialect.h"
 #include "circt/Dialect/RTGTest/IR/RTGTestTypes.h"
 #include "circt/Support/LLVM.h"
diff --git a/include/circt/Dialect/RTGTest/IR/RTGTestOps.td b/include/circt/Dialect/RTGTest/IR/RTGTestOps.td
@@ -22,18 +22,21 @@ class RTGTestOp<string mnemonic, list<Trait> traits = []> :
 
 def CPUDeclOp : RTGTestOp<"cpu_decl", [
   Pure,
+  ConstantLike,
   ContextResourceDefining,
+  FirstAttrDerivedResultType,
 ]> {
   let summary = "declare a CPU";
   let description = [{
     This operation is used to test the `ContextResourceOpInterface` and passes
     taking advantage of it.
   }];
 
-  let arguments = (ins IndexAttr:$id);
+  let arguments = (ins CPUAttr:$id);
   let results = (outs CPUType:$cpu);
 
   let assemblyFormat = "$id attr-dict";
+  let hasFolder = 1;
 }
 
 def ConstantTestOp : RTGTestOp<"constant_test", [
diff --git a/lib/Dialect/RTG/IR/CMakeLists.txt b/lib/Dialect/RTG/IR/CMakeLists.txt
@@ -5,6 +5,7 @@ add_circt_dialect_library(CIRCTRTGDialect
   RTGOps.cpp
   RTGTypes.cpp
   RTGTypeInterfaces.cpp
+  RTGAttrInterfaces.cpp
 
   ADDITIONAL_HEADER_DIRS
   ${CIRCT_MAIN_INCLUDE_DIR}/circt/Dialect/RTG/IR
@@ -15,6 +16,7 @@ add_circt_dialect_library(CIRCTRTGDialect
   CIRCTRTGOpInterfacesIncGen
   CIRCTRTGISAAssemblyOpInterfacesIncGen
   CIRCTRTGTypeInterfacesIncGen
+  CIRCTRTGAttrInterfacesIncGen
     
   LINK_LIBS PUBLIC
   MLIRIR
diff --git a/lib/Dialect/RTG/IR/RTGAttrInterfaces.cpp b/lib/Dialect/RTG/IR/RTGAttrInterfaces.cpp
@@ -0,0 +1,19 @@
+//===- RTGAttrInterfaces.cpp - Implement the RTG attr interfaces ----------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the RTG attr interfaces.
+//
+//===----------------------------------------------------------------------===//
+
+#include "circt/Dialect/RTG/IR/RTGAttrInterfaces.h"
+
+//===----------------------------------------------------------------------===//
+// TableGen generated logic.
+//===----------------------------------------------------------------------===//
+
+#include "circt/Dialect/RTG/IR/RTGAttrInterfaces.cpp.inc"
diff --git a/lib/Dialect/RTGTest/IR/CMakeLists.txt b/lib/Dialect/RTGTest/IR/CMakeLists.txt
@@ -1,4 +1,5 @@
 add_circt_dialect_library(CIRCTRTGTestDialect
+  RTGTestAttributes.cpp
   RTGTestDialect.cpp
   RTGTestOps.cpp
   RTGTestTypes.cpp
@@ -9,6 +10,7 @@ add_circt_dialect_library(CIRCTRTGTestDialect
   DEPENDS
   MLIRRTGTestIncGen
   CIRCTRTGTestEnumsIncGen
+  CIRCTRTGTestAttributeIncGen
   
   LINK_LIBS PUBLIC
   MLIRIR
diff --git a/lib/Dialect/RTGTest/IR/RTGTestAttributes.cpp b/lib/Dialect/RTGTest/IR/RTGTestAttributes.cpp
@@ -0,0 +1,36 @@
+//===- RTGTestAttributes.cpp ----------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "circt/Dialect/RTGTest/IR/RTGTestAttributes.h"
+#include "circt/Dialect/RTGTest/IR/RTGTestDialect.h"
+#include "mlir/IR/Builders.h"
+#include "mlir/IR/DialectImplementation.h"
+#include "llvm/ADT/TypeSwitch.h"
+
+using namespace circt;
+using namespace rtgtest;
+
+//===----------------------------------------------------------------------===//
+// CPUAttr
+//===----------------------------------------------------------------------===//
+
+Type CPUAttr::getType() const { return rtgtest::CPUType::get(getContext()); }
+
+//===----------------------------------------------------------------------===//
+// TableGen generated logic.
+//===----------------------------------------------------------------------===//
+
+void RTGTestDialect::registerAttributes() {
+  addAttributes<
+#define GET_ATTRDEF_LIST
+#include "circt/Dialect/RTGTest/IR/RTGTestAttributes.cpp.inc"
+      >();
+}
+
+#define GET_ATTRDEF_CLASSES
+#include "circt/Dialect/RTGTest/IR/RTGTestAttributes.cpp.inc"
diff --git a/lib/Dialect/RTGTest/IR/RTGTestDialect.cpp b/lib/Dialect/RTGTest/IR/RTGTestDialect.cpp
@@ -26,6 +26,7 @@ using namespace rtgtest;
 
 void RTGTestDialect::initialize() {
   registerTypes();
+  registerAttributes();
   // Register operations.
   addOperations<
 #define GET_OP_LIST
diff --git a/lib/Dialect/RTGTest/IR/RTGTestOps.cpp b/lib/Dialect/RTGTest/IR/RTGTestOps.cpp
@@ -21,7 +21,9 @@ using namespace rtgtest;
 // CPUDeclOp
 //===----------------------------------------------------------------------===//
 
-size_t CPUDeclOp::getIdentifier(size_t idx) { return getId().getZExtValue(); }
+size_t CPUDeclOp::getIdentifier(size_t idx) { return getId().getId(); }
+
+mlir::OpFoldResult CPUDeclOp::fold(FoldAdaptor adaptor) { return getId(); }
 
 //===----------------------------------------------------------------------===//
 // ConstantTestOp
diff --git a/test/Dialect/RTGTest/IR/basic.mlir b/test/Dialect/RTGTest/IR/basic.mlir
@@ -3,8 +3,8 @@
 // CHECK-LABEL: @cpus
 // CHECK-SAME: !rtgtest.cpu
 rtg.target @cpus : !rtg.dict<cpu: !rtgtest.cpu> {
-  // CHECK: rtgtest.cpu_decl 0
-  %0 = rtgtest.cpu_decl 0
+  // CHECK: rtgtest.cpu_decl <0>
+  %0 = rtgtest.cpu_decl <0>
   rtg.yield %0 : !rtgtest.cpu
 }
 
