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maerhartmaerhart
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[RTGTest] Improved register representation
1 parent 98b463d commit 82ecbdc

29 files changed

+1387
-287
lines changed

‎include/circt-c/Dialect/RTGTest.h

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Original file line numberDiff line numberDiff line change
@@ -45,6 +45,201 @@ MLIR_CAPI_EXPORTED MlirAttribute rtgtestCPUAttrGet(MlirContext ctxt,
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/// Returns the core ID represented by the CPU attribute.
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MLIR_CAPI_EXPORTED unsigned rtgtestCPUAttrGetId(MlirAttribute attr);
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// Registers.
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//===----------------------------------------------------------------------===//
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/// If the type is an RTGTest RegZeroAttr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegZero(MlirAttribute attr);
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/// Creates an RTGTest RegZero attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegZeroAttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegRaAttr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegRa(MlirAttribute attr);
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/// Creates an RTGTest RegRa attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegRaAttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegSpAttr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegSp(MlirAttribute attr);
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/// Creates an RTGTest RegSp attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegSpAttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegGpAttr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegGp(MlirAttribute attr);
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/// Creates an RTGTest RegGp attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegGpAttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegTpAttr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegTp(MlirAttribute attr);
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/// Creates an RTGTest RegTp attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegTpAttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegT0Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT0(MlirAttribute attr);
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/// Creates an RTGTest RegT0 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT0AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegT1Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT1(MlirAttribute attr);
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/// Creates an RTGTest RegT1 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT1AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegT2Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT2(MlirAttribute attr);
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/// Creates an RTGTest RegT2 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT2AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegS0Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS0(MlirAttribute attr);
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/// Creates an RTGTest RegS0 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS0AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegS1Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS1(MlirAttribute attr);
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/// Creates an RTGTest RegS1 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS1AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegA0Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA0(MlirAttribute attr);
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/// Creates an RTGTest RegA0 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA0AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegA1Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA1(MlirAttribute attr);
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/// Creates an RTGTest RegA1 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA1AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegA2Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA2(MlirAttribute attr);
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/// Creates an RTGTest RegA2 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA2AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegA3Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA3(MlirAttribute attr);
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/// Creates an RTGTest RegA3 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA3AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegA4Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA4(MlirAttribute attr);
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/// Creates an RTGTest RegA4 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA4AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegA5Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA5(MlirAttribute attr);
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/// Creates an RTGTest RegA5 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA5AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegA6Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA6(MlirAttribute attr);
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/// Creates an RTGTest RegA6 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA6AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegA7Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegA7(MlirAttribute attr);
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/// Creates an RTGTest RegA7 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegA7AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegS2Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS2(MlirAttribute attr);
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/// Creates an RTGTest RegS2 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS2AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegS3Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS3(MlirAttribute attr);
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/// Creates an RTGTest RegS3 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS3AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegS4Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS4(MlirAttribute attr);
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/// Creates an RTGTest RegS4 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS4AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegS5Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS5(MlirAttribute attr);
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/// Creates an RTGTest RegS5 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS5AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegS6Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS6(MlirAttribute attr);
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/// Creates an RTGTest RegS6 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS6AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegS7Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS7(MlirAttribute attr);
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/// Creates an RTGTest RegS7 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS7AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegS8Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS8(MlirAttribute attr);
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/// Creates an RTGTest RegS8 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS8AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegS9Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS9(MlirAttribute attr);
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/// Creates an RTGTest RegS9 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS9AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegS10Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS10(MlirAttribute attr);
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/// Creates an RTGTest RegS10 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS10AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegS11Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegS11(MlirAttribute attr);
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/// Creates an RTGTest RegS11 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegS11AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegT3Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT3(MlirAttribute attr);
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/// Creates an RTGTest RegT3 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT3AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegT4Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT4(MlirAttribute attr);
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/// Creates an RTGTest RegT4 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT4AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegT5Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT5(MlirAttribute attr);
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/// Creates an RTGTest RegT5 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT5AttrGet(MlirContext ctxt);
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/// If the attribute is an RTGTest RegT6Attr.
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MLIR_CAPI_EXPORTED bool rtgtestAttrIsARegT6(MlirAttribute attr);
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/// Creates an RTGTest RegT6 attribute in the context.
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MLIR_CAPI_EXPORTED MlirAttribute rtgtestRegT6AttrGet(MlirContext ctxt);
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#ifdef __cplusplus
49244
}
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#endif

‎include/circt/Dialect/RTG/IR/CMakeLists.txt

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@@ -24,6 +24,16 @@ add_public_tablegen_target(CIRCTRTGAttrInterfacesIncGen)
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add_dependencies(circt-headers CIRCTRTGAttrInterfacesIncGen)
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set(LLVM_TARGET_DEFINITIONS RTGISAAssemblyInterfaces.td)
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mlir_tablegen(RTGISAAssemblyAttrInterfaces.h.inc -gen-attr-interface-decls)
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mlir_tablegen(RTGISAAssemblyAttrInterfaces.cpp.inc -gen-attr-interface-defs)
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add_public_tablegen_target(CIRCTRTGISAAssemblyAttrInterfacesIncGen)
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add_dependencies(circt-headers CIRCTRTGISAAssemblyAttrInterfacesIncGen)
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32+
mlir_tablegen(RTGISAAssemblyTypeInterfaces.h.inc -gen-type-interface-decls)
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mlir_tablegen(RTGISAAssemblyTypeInterfaces.cpp.inc -gen-type-interface-defs)
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add_public_tablegen_target(CIRCTRTGISAAssemblyTypeInterfacesIncGen)
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add_dependencies(circt-headers CIRCTRTGISAAssemblyTypeInterfacesIncGen)
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mlir_tablegen(RTGISAAssemblyOpInterfaces.h.inc -gen-op-interface-decls)
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mlir_tablegen(RTGISAAssemblyOpInterfaces.cpp.inc -gen-op-interface-defs)
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add_public_tablegen_target(CIRCTRTGISAAssemblyOpInterfacesIncGen)

‎include/circt/Dialect/RTG/IR/RTGISAAssemblyAttrInterfaces.h

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@@ -0,0 +1,24 @@
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//===- RTGISAAssemblyAttrInterfaces.h - Interf. for ISA ASM RTG -*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares attr interfaces for the RTG Dialect that are specific to
10+
// ISA Assembly tests.
11+
//
12+
//===----------------------------------------------------------------------===//
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#ifndef CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYATTRINTERFACES_H
15+
#define CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYATTRINTERFACES_H
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#include "circt/Dialect/RTG/IR/RTGISAAssemblyTypeInterfaces.h"
18+
#include "mlir/IR/Attributes.h"
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#include "mlir/IR/BuiltinAttributeInterfaces.h"
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#include "llvm/ADT/APInt.h"
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#include "circt/Dialect/RTG/IR/RTGISAAssemblyAttrInterfaces.h.inc"
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#endif // CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYATTRINTERFACES_H

‎include/circt/Dialect/RTG/IR/RTGISAAssemblyInterfaces.td

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@@ -10,51 +10,38 @@
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#define CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYINTERFACES_TD
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1212
include "mlir/IR/Interfaces.td"
13-
include "mlir/IR/OpBase.td"
13+
include "mlir/IR/BuiltinAttributeInterfaces.td"
1414

15-
def RegisterOpInterface : OpInterface<"RegisterOpInterface"> {
15+
def RegisterAttrInterface : AttrInterface<"RegisterAttrInterface", [TypedAttrInterface]> {
1616
let description = [{
17-
This interface should be implemented by operations that represent
18-
ISA registers. It is used for register allocation, emission, etc.
19-
20-
Virtual registers are indicated by a register index of ~0.
17+
This interface should be implemented by attributes that represent
18+
ISA registers. It is used for elaboration, register allocation, emission,
19+
etc.
2120
}];
2221
let cppNamespace = "::circt::rtg";
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2423
let methods = [
25-
InterfaceMethod<[{
26-
Returns the bitvector of the Dialect's canonical register indices for
27-
which this operation allows.
28-
}],
29-
"::llvm::BitVector", "getAllowedRegs">,
30-
InterfaceMethod<[{
31-
Returns the Dialect's canonical register index of the register if it
32-
selects a specific one, or ~0 if it isn't fixed yet.
33-
}],
34-
"unsigned", "getFixedReg">,
35-
InterfaceMethod<[{
36-
Sets this operation to use a specific register given by the Dialect's
37-
canonical register index.
38-
}],
39-
"void", "setFixedReg", (ins "unsigned":$reg)>,
4024
InterfaceMethod<[{
4125
Returns the class specific index of the register. This translates from
4226
the flat internal representation to the architectural representation.
4327
}],
4428
"unsigned", "getClassIndex">,
45-
InterfaceMethod<[{
46-
Returns the class specific index of the register. This translates from
47-
the flat internal representation to the architectural representation.
48-
This returns an APInt for the common binary encoding.
49-
}],
50-
"llvm::APInt", "getClassIndexBinary">,
5129
InterfaceMethod<[{
5230
Returns a suitable string for use in assembly format.
5331
}],
54-
"std::string", "getRegisterAssembly">,
32+
"llvm::StringLiteral", "getRegisterAssembly">,
5533
];
5634
}
5735

36+
def RegisterTypeInterface : TypeInterface<"RegisterTypeInterface"> {
37+
let description = [{
38+
This interface should be implemented by types that represent
39+
ISA registers. It is used for elaboration, register allocation, emission,
40+
etc.
41+
}];
42+
let cppNamespace = "::circt::rtg";
43+
}
44+
5845
def InstructionOpInterface : OpInterface<"InstructionOpInterface"> {
5946
let description = [{
6047
This interface should be implemented by operations that represent
@@ -69,15 +56,15 @@ def InstructionOpInterface : OpInterface<"InstructionOpInterface"> {
6956
}],
7057
"void", "printInstructionBinary",
7158
(ins "llvm::raw_ostream &":$os,
72-
"llvm::ArrayRef<mlir::Attribute>":$operands)>,
59+
"llvm::ArrayRef<rtg::RegisterAttrInterface>":$operands)>,
7360
StaticInterfaceMethod<[{
7461
Emits the ISA assembly representation of the instruction to the provided
7562
stream. The format should be the one understood by common assembler
7663
tools.
7764
}],
7865
"void", "printInstructionAssembly",
7966
(ins "llvm::raw_ostream &":$os,
80-
"llvm::ArrayRef<mlir::Attribute>":$operands)>,
67+
"llvm::ArrayRef<rtg::RegisterAttrInterface>":$operands)>,
8168
];
8269
}
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‎include/circt/Dialect/RTG/IR/RTGISAAssemblyOpInterfaces.h

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@@ -14,6 +14,7 @@
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#ifndef CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYOPINTERFACES_H
1515
#define CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYOPINTERFACES_H
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17+
#include "circt/Dialect/RTG/IR/RTGISAAssemblyAttrInterfaces.h"
1718
#include "circt/Support/LLVM.h"
1819
#include "mlir/IR/OpDefinition.h"
1920

‎include/circt/Dialect/RTG/IR/RTGISAAssemblyTypeInterfaces.h

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@@ -0,0 +1,22 @@
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//===- RTGISAAssemblyTypeInterfaces.h - Interf. for ISA ASM RTG -*- C++ -*-===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
//
9+
// This file declares type interfaces for the RTG Dialect that are specific to
10+
// ISA Assembly tests.
11+
//
12+
//===----------------------------------------------------------------------===//
13+
14+
#ifndef CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYTYPEINTERFACES_H
15+
#define CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYTYPEINTERFACES_H
16+
17+
#include "circt/Support/LLVM.h"
18+
#include "mlir/IR/Types.h"
19+
20+
#include "circt/Dialect/RTG/IR/RTGISAAssemblyTypeInterfaces.h.inc"
21+
22+
#endif // CIRCT_DIALECT_RTG_IR_RTGISAASSEMBLYTYPEINTERFACES_H

‎include/circt/Dialect/RTG/IR/RTGOps.h

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#include "circt/Dialect/RTG/IR/RTGAttrInterfaces.h"
1717
#include "circt/Dialect/RTG/IR/RTGDialect.h"
18+
#include "circt/Dialect/RTG/IR/RTGISAAssemblyAttrInterfaces.h"
19+
#include "circt/Dialect/RTG/IR/RTGISAAssemblyTypeInterfaces.h"
1820
#include "circt/Dialect/RTG/IR/RTGTypeInterfaces.h"
1921
#include "circt/Dialect/RTG/IR/RTGTypes.h"
2022
#include "circt/Support/LLVM.h"

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