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2 parents 9fb7fef + 664d3ad commit 0141e62Copy full SHA for 0141e62
plugin/verilog_systemverilog.vim
@@ -1,5 +1,7 @@
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" Global plugin settings
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-let g:verilog_disable_indent_lst="eos,standalone"
+if !exists("g:verilog_disable_indent_lst")
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+ let g:verilog_disable_indent_lst="eos,standalone"
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+endif
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" Command definitions
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command! -nargs=* VerilogErrorFormat call verilog_systemverilog#VerilogErrorFormat(<f-args>)
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