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3 changes: 3 additions & 0 deletions cpu/cpu.go
Original file line number Diff line number Diff line change
Expand Up @@ -92,6 +92,9 @@ var ARM64 struct {
HasSHA2 bool // SHA2 hardware implementation
HasCRC32 bool // CRC32 hardware implementation
HasATOMICS bool // Atomic memory operation instruction set
HasHPDS bool // Hierarchical permission disables in translations tables
HasLOR bool // Limited ordering regions
HasPAN bool // Privileged access never
HasFPHP bool // Half precision floating-point instruction set
HasASIMDHP bool // Advanced SIMD half precision instruction set
HasCPUID bool // CPUID identification scheme registers
Expand Down
20 changes: 18 additions & 2 deletions cpu/cpu_arm64.go
Original file line number Diff line number Diff line change
Expand Up @@ -65,10 +65,10 @@ func setMinimalFeatures() {
func readARM64Registers() {
Initialized = true

parseARM64SystemRegisters(getisar0(), getisar1(), getpfr0())
parseARM64SystemRegisters(getisar0(), getisar1(), getmmfr1(), getpfr0())
}

func parseARM64SystemRegisters(isar0, isar1, pfr0 uint64) {
func parseARM64SystemRegisters(isar0, isar1, mmfr1, pfr0 uint64) {
// ID_AA64ISAR0_EL1
switch extractBits(isar0, 4, 7) {
case 1:
Expand Down Expand Up @@ -152,6 +152,22 @@ func parseARM64SystemRegisters(isar0, isar1, pfr0 uint64) {
ARM64.HasI8MM = true
}

// ID_AA64MMFR1_EL1
switch extractBits(mmfr1, 12, 15) {
case 1:
ARM64.HasHPDS = true
}

switch extractBits(mmfr1, 16, 19) {
case 1:
ARM64.HasLOR = true
}

switch extractBits(mmfr1, 20, 23) {
case 1:
ARM64.HasPAN = true
}

// ID_AA64PFR0_EL1
switch extractBits(pfr0, 16, 19) {
case 0:
Expand Down
8 changes: 8 additions & 0 deletions cpu/cpu_arm64.s
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,14 @@ TEXT ·getisar1(SB),NOSPLIT,$0-8
MOVD R0, ret+0(FP)
RET

// func getmmfr1() uint64
TEXT ·getmmfr1(SB),NOSPLIT,$0-8
// get SVE Feature Register 0 into x0
// mrs x0, ID_AA64MMFR1_EL1 = d5380720
WORD $0xd5380720
MOVD R0, ret+0(FP)
RET

// func getpfr0() uint64
TEXT ·getpfr0(SB),NOSPLIT,$0-8
// get Processor Feature Register 0 into x0
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1 change: 1 addition & 0 deletions cpu/cpu_gc_arm64.go
Original file line number Diff line number Diff line change
Expand Up @@ -8,5 +8,6 @@ package cpu

func getisar0() uint64
func getisar1() uint64
func getmmfr1() uint64
func getpfr0() uint64
func getzfr0() uint64
1 change: 1 addition & 0 deletions cpu/cpu_gccgo_arm64.go
Original file line number Diff line number Diff line change
Expand Up @@ -8,4 +8,5 @@ package cpu

func getisar0() uint64 { return 0 }
func getisar1() uint64 { return 0 }
func getmmfr1() uint64 { return 0 }
func getpfr0() uint64 { return 0 }