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#include <stdint.h> | ||
#include <pic32mx.h> | ||
#include "snake.h" | ||
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#define DISPLAY_CHANGE_TO_COMMAND_MODE (PORTFCLR = 0x10) | ||
#define DISPLAY_CHANGE_TO_DATA_MODE (PORTFSET = 0x10) | ||
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#define DISPLAY_ACTIVATE_RESET (PORTGCLR = 0x200) | ||
#define DISPLAY_DO_NOT_RESET (PORTGSET = 0x200) | ||
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#define DISPLAY_ACTIVATE_VDD (PORTFCLR = 0x40) | ||
#define DISPLAY_ACTIVATE_VBAT (PORTFCLR = 0x20) | ||
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#define DISPLAY_TURN_OFF_VDD (PORTFSET = 0x40) | ||
#define DISPLAY_TURN_OFF_VBAT (PORTFSET = 0x20) | ||
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void quicksleep(int cyc) { | ||
int i; | ||
for(i = cyc; i > 0; i--); | ||
} | ||
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void display_init(void){ | ||
DISPLAY_CHANGE_TO_COMMAND_MODE; | ||
quicksleep(10); | ||
DISPLAY_ACTIVATE_VDD; | ||
quicksleep(1000000); | ||
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spi_send_recv(0xAE); | ||
DISPLAY_ACTIVATE_RESET; | ||
quicksleep(10); | ||
DISPLAY_DO_NOT_RESET; | ||
quicksleep(10); | ||
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spi_send_recv(0x8D); | ||
spi_send_recv(0x14); | ||
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spi_send_recv(0xD9); | ||
spi_send_recv(0xF1); | ||
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DISPLAY_ACTIVATE_VBAT; | ||
quicksleep(10000000); | ||
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spi_send_recv(0xA1); | ||
spi_send_recv(0xC8); | ||
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spi_send_recv(0xDA); | ||
spi_send_recv(0x20); | ||
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spi_send_recv(0xAF); | ||
} | ||
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void display_string(int line, char *s) { | ||
int i; | ||
if(line < 0 || line >= 4) | ||
return; | ||
if(!s) | ||
return; | ||
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for(i = 0; i < 16; i++) | ||
if(*s) { | ||
textbuffer[line][i] = *s; | ||
s++; | ||
} else | ||
textbuffer[line][i] = ' '; | ||
} | ||
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void display_update(void) { | ||
int i, j, k; | ||
int c; | ||
for(i = 0; i < 4; i++) { | ||
DISPLAY_CHANGE_TO_COMMAND_MODE; | ||
spi_send_recv(0x22); | ||
spi_send_recv(i); | ||
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spi_send_recv(0x0); | ||
spi_send_recv(0x10); | ||
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DISPLAY_CHANGE_TO_DATA_MODE; | ||
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for(j = 0; j < 16; j++) { | ||
c = textbuffer[i][j]; | ||
if(c & 0x80) | ||
continue; | ||
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for(k = 0; k < 8; k++) | ||
spi_send_recv(font[c*8 + k]); | ||
} | ||
} | ||
} |
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#include <stdint.h> | ||
#include <pic32mx.h> | ||
#include "snake.h" | ||
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int main(void){ | ||
/* | ||
This will set the peripheral bus clock to the same frequency | ||
as the sysclock. That means 80 MHz, when the microcontroller | ||
is running at 80 MHz. Changed 2017, as recommended by Axel. | ||
*/ | ||
SYSKEY = 0xAA996655; /* Unlock OSCCON, step 1 */ | ||
SYSKEY = 0x556699AA; /* Unlock OSCCON, step 2 */ | ||
while(OSCCON & (1 << 21)); /* Wait until PBDIV ready */ | ||
OSCCONCLR = 0x180000; /* clear PBDIV bit <0,1> */ | ||
while(OSCCON & (1 << 21)); /* Wait until PBDIV ready */ | ||
SYSKEY = 0x0; /* Lock OSCCON */ | ||
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/* Set up output pins */ | ||
AD1PCFG = 0xFFFF; | ||
ODCE = 0x0; | ||
TRISECLR = 0xFF; | ||
PORTE = 0x0; | ||
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/* Output pins for display signals */ | ||
PORTF = 0xFFFF; | ||
PORTG = (1 << 9); | ||
ODCF = 0x0; | ||
ODCG = 0x0; | ||
TRISFCLR = 0x70; | ||
TRISGCLR = 0x200; | ||
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/* Set up input pins */ | ||
TRISDSET = (1 << 8); | ||
TRISFSET = (1 << 1); | ||
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/* Set up SPI as master */ | ||
SPI2CON = 0; | ||
SPI2BRG = 4; | ||
/* SPI2STAT bit SPIROV = 0; */ | ||
SPI2STATCLR = 0x40; | ||
/* SPI2CON bit CKP = 1; */ | ||
SPI2CONSET = 0x40; | ||
/* SPI2CON bit MSTEN = 1; */ | ||
SPI2CONSET = 0x20; | ||
/* SPI2CON bit ON = 1; */ | ||
SPI2CONSET = 0x8000; | ||
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display_init(); | ||
display_string(0, "TEST"); | ||
display_update(); | ||
return; | ||
} |
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Original file line number | Diff line number | Diff line change |
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#include <stdint.h> | ||
#include <pic32mx.h> | ||
#include "snake.h" | ||
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uint8_t spi_send_recv(uint8_t data); | ||
extern char textbuffer[4][16]; | ||
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int main(void); | ||
void quicksleep(int cyc); | ||
void display_init(void); | ||
void display_string(int line, char *s); | ||
void display_update(void); | ||
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