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Revert: ARCv3: link above 4GB: handle 64-bit literals in final link #100

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Revert: ARCv3: link above 4GB: handle 64-bit literals in final link #100

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dd0f15a
Revert: ARCv3: link above 4GB: handle 64-bit literals in final link
abrodkin Feb 2, 2023
cd7aa41
Disable 64-bit targets
abrodkin Feb 2, 2023
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14 changes: 1 addition & 13 deletions .github/workflows/ci.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -33,18 +33,6 @@ jobs:
- cpu: hs5x-hw-atomic64
toolchain: arc32-glibc
defconfig: haps_hs5x_defconfig
- cpu: hs6x
toolchain: arc64-glibc
defconfig: haps_arc64_defconfig
- cpu: hs6x-mmu48-16k
toolchain: arc64-glibc
defconfig: haps_arc64_defconfig
- cpu: hs6x-mmu48-64k
toolchain: arc64-glibc
defconfig: haps_arc64_defconfig
- cpu: hs6x-mmu52
toolchain: arc64-glibc
defconfig: haps_arc64_defconfig
fail-fast: false

steps:
Expand Down Expand Up @@ -170,7 +158,7 @@ jobs:
runs-on: nsim
strategy:
matrix:
targets: [arc700, hs4x, hs4x-pae40, hs5x, hs5x-hw-atomic64, hs6x, hs6x-mmu48-16k, hs6x-mmu48-64k, hs6x-mmu52]
targets: [arc700, hs4x, hs4x-pae40, hs5x, hs5x-hw-atomic64]
fail-fast: false

steps:
Expand Down
6 changes: 2 additions & 4 deletions arch/arc/include/asm/entry.h
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Expand Up @@ -129,13 +129,11 @@
#else /* Uniprocessor implementation of macros */

.macro GET_CURR_TASK_ON_CPU reg
MOVA \reg, @_current_task
LDR \reg, \reg
LDR \reg, @_current_task
.endm

.macro SET_CURR_TASK_ON_CPU tsk, tmp
MOVA \tmp, @_current_task
STR \tsk, \tmp
STR \tsk, @_current_task
#ifdef CONFIG_ARC_CURR_IN_REG
MOVR gp, \tsk
#endif
Expand Down
6 changes: 3 additions & 3 deletions arch/arc/include/asm/futex.h
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Expand Up @@ -30,7 +30,7 @@
" .section .fixup,\"ax\" \n" \
" .align 4 \n" \
"4: mov %0, %4 \n" \
" b 3b \n" \
" j 3b \n" \
" .previous \n" \
" .section __ex_table,\"a\" \n" \
" .align " REGSZASM " \n" \
Expand All @@ -57,7 +57,7 @@
" .section .fixup,\"ax\" \n" \
" .align 4 \n" \
"4: mov %0, %4 \n" \
" b 3b \n" \
" j 3b \n" \
" .previous \n" \
" .section __ex_table,\"a\" \n" \
" .align " REGSZASM " \n" \
Expand Down Expand Up @@ -148,7 +148,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 expval,
"3: \n"
" .section .fixup,\"ax\" \n"
"4: mov %0, %5 \n"
" b 3b \n"
" j 3b \n"
" .previous \n"
" .section __ex_table,\"a\" \n"
" .align " REGSZASM " \n"
Expand Down
10 changes: 5 additions & 5 deletions arch/arc/include/asm/uaccess.h
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Expand Up @@ -84,7 +84,7 @@
" mov %0, %3\n" \
" # zero out dst ptr\n" \
" mov %1, 0\n" \
" b 2b\n" \
" j 2b\n" \
" .previous\n" \
" .section __ex_table, \"a\"\n" \
" .align " REGSZASM " \n" \
Expand Down Expand Up @@ -118,7 +118,7 @@
" # zero out dst ptr\n" \
" mov %1, 0\n" \
" mov %R1, 0\n" \
" b 2b\n" \
" j 2b\n" \
" .previous\n" \
" .section __ex_table, \"a\"\n" \
" .align 4\n" \
Expand Down Expand Up @@ -150,7 +150,7 @@
" .section .fixup, \"ax\"\n" \
" .align 4\n" \
"3: mov %0, %3\n" \
" b 2b\n" \
" j 2b\n" \
" .previous\n" \
" .section __ex_table, \"a\"\n" \
" .align " REGSZASM " \n" \
Expand Down Expand Up @@ -180,7 +180,7 @@
" .section .fixup, \"ax\"\n" \
" .align 4\n" \
"3: mov %0, %3\n" \
" b 2b\n" \
" j 2b\n" \
" .previous\n" \
" .section __ex_table, \"a\"\n" \
" .align 4\n" \
Expand Down Expand Up @@ -221,7 +221,7 @@ raw_copy_from_user(void *to, const void __user *from, unsigned long n)
"2: ;nop \n"
" .section .fixup, \"ax\" \n"
" .align 4 \n"
"3: b 2b \n"
"3: j 2b \n"
" .previous \n"
" .section __ex_table, \"a\" \n"
" .align 4 \n"
Expand Down
9 changes: 4 additions & 5 deletions arch/arc/kernel/entry-cmn.S
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Expand Up @@ -96,8 +96,8 @@ ENTRY(EV_TLBProtV)

EXCEPTION_PROLOGUE

bl do_page_fault
b ret_from_exception
MOVR blink, ret_from_exception
b do_page_fault

END(EV_TLBProtV)

Expand Down Expand Up @@ -180,10 +180,9 @@ debug_marker_syscall:
.Lintr_ret_to_delay_slot:
debug_marker_ds:

MOVA r3, @intr_to_DE_cnt
ld r2, [r3]
ld r2, [@intr_to_DE_cnt]
add r2, r2, 1
st r2, [r3]
st r2, [@intr_to_DE_cnt]

; drop out of interrupt context (clear AUX_IRQ_ACT.active)
bmskn r11, r10, 15
Expand Down
10 changes: 5 additions & 5 deletions arch/arc/kernel/entry.S
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Expand Up @@ -51,7 +51,7 @@ ENTRY(ret_from_fork)
; when the forked child comes here from the __switch_to function
; r0 has the last task pointer.
; put last task in scheduler queue
bl @schedule_tail
jl @schedule_tail

ld r9, [sp, PT_status32]
brne r9, 0, 1f
Expand Down Expand Up @@ -109,7 +109,7 @@ ENTRY(EV_MachineCheck)
GET_CURR_TASK_FIELD_PTR TASK_THREAD, r10
st sp, [r10, THREAD_CALLEE_REG]

b do_machine_check_fault
j do_machine_check_fault

END(EV_MachineCheck)

Expand Down Expand Up @@ -269,8 +269,8 @@ resume_user_mode_begin:

; --- (Slow Path #1) task preemption ---
bbit0 r9, TIF_NEED_RESCHED, .Lchk_pend_signals
bl @schedule ; BTST+Bnz causes relo error in link
b resume_user_mode_begin
MOVR blink, resume_user_mode_begin ; tail-call to U mode ret chks
j @schedule ; BTST+Bnz causes relo error in link

.Lchk_pend_signals:
IRQ_ENABLE r10
Expand Down Expand Up @@ -332,7 +332,7 @@ resume_kernel_mode:
bbit0 r9, TIF_NEED_RESCHED, .Lrestore_regs

; Invoke PREEMPTION
bl preempt_schedule_irq
jl preempt_schedule_irq

; preempt_schedule_irq() always returns with IRQ disabled
#endif
Expand Down