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Track how some special EVEX instructions are handled differently
1 parent 5453487 commit 49ac243

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5 files changed

+107
-54
lines changed

5 files changed

+107
-54
lines changed

‎src/coreclr/jit/emitxarch.cpp

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -5847,12 +5847,10 @@ bool emitter::IsMovInstruction(instruction ins)
58475847
case INS_movaps:
58485848
case INS_movd:
58495849
case INS_movdqa:
5850-
case INS_vmovdqa32:
58515850
case INS_vmovdqa64:
58525851
case INS_movdqu:
58535852
case INS_vmovdqu8:
58545853
case INS_vmovdqu16:
5855-
case INS_vmovdqu32:
58565854
case INS_vmovdqu64:
58575855
case INS_movsd_simd:
58585856
case INS_movss:
@@ -5996,11 +5994,9 @@ bool emitter::HasSideEffect(instruction ins, emitAttr size)
59965994
break;
59975995
}
59985996

5999-
case INS_vmovdqa32:
60005997
case INS_vmovdqa64:
60015998
case INS_vmovdqu8:
60025999
case INS_vmovdqu16:
6003-
case INS_vmovdqu32:
60046000
case INS_vmovdqu64:
60056001
{
60066002
// These EVEX instructions merges/masks based on k-register
@@ -6212,12 +6208,10 @@ void emitter::emitIns_Mov(instruction ins, emitAttr attr, regNumber dstReg, regN
62126208
case INS_movapd:
62136209
case INS_movaps:
62146210
case INS_movdqa:
6215-
case INS_vmovdqa32:
62166211
case INS_vmovdqa64:
62176212
case INS_movdqu:
62186213
case INS_vmovdqu8:
62196214
case INS_vmovdqu16:
6220-
case INS_vmovdqu32:
62216215
case INS_vmovdqu64:
62226216
case INS_movsd_simd:
62236217
case INS_movss:
@@ -17439,12 +17433,10 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
1743917433
break;
1744017434

1744117435
case INS_movdqa:
17442-
case INS_vmovdqa32:
1744317436
case INS_vmovdqa64:
1744417437
case INS_movdqu:
1744517438
case INS_vmovdqu8:
1744617439
case INS_vmovdqu16:
17447-
case INS_vmovdqu32:
1744817440
case INS_vmovdqu64:
1744917441
case INS_movaps:
1745017442
case INS_movups:
@@ -17658,16 +17650,12 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
1765817650
case INS_paddusw:
1765917651
case INS_psubusw:
1766017652
case INS_pand:
17661-
case INS_vpandd:
1766217653
case INS_vpandq:
1766317654
case INS_pandn:
17664-
case INS_vpandnd:
1766517655
case INS_vpandnq:
1766617656
case INS_por:
17667-
case INS_vpord:
1766817657
case INS_vporq:
1766917658
case INS_pxor:
17670-
case INS_vpxord:
1767117659
case INS_vpxorq:
1767217660
case INS_andpd:
1767317661
case INS_andps:

‎src/coreclr/jit/hwintrinsiclistxarch.h

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -225,7 +225,7 @@ HARDWARE_INTRINSIC(Vector256, StoreUnsafe,
225225
HARDWARE_INTRINSIC(Vector256, Subtract, 32, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen)
226226
HARDWARE_INTRINSIC(Vector256, Sum, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoCodeGen)
227227
HARDWARE_INTRINSIC(Vector256, ToScalar, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_movss, INS_movsd_simd}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics|HW_Flag_AvxOnlyCompatible)
228-
HARDWARE_INTRINSIC(Vector256, ToVector512Unsafe, 32, 1, {INS_vmovdqu8, INS_vmovdqu8, INS_vmovdqu16, INS_vmovdqu16, INS_vmovdqu32, INS_vmovdqu32, INS_vmovdqu64, INS_vmovdqu64, INS_movups, INS_movupd}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
228+
HARDWARE_INTRINSIC(Vector256, ToVector512Unsafe, 32, 1, {INS_vmovdqu8, INS_vmovdqu8, INS_vmovdqu16, INS_vmovdqu16, INS_movdqu, INS_movdqu, INS_vmovdqu64, INS_vmovdqu64, INS_movups, INS_movupd}, HW_Category_SimpleSIMD, HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_BaseTypeFromFirstArg|HW_Flag_NoRMWSemantics)
229229
HARDWARE_INTRINSIC(Vector256, WidenLower, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
230230
HARDWARE_INTRINSIC(Vector256, WidenUpper, 32, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen|HW_Flag_BaseTypeFromFirstArg)
231231
HARDWARE_INTRINSIC(Vector256, WithElement, 32, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoContainment|HW_Flag_BaseTypeFromFirstArg|HW_Flag_AvxOnlyCompatible)
@@ -750,18 +750,18 @@ HARDWARE_INTRINSIC(AVX2, Xor,
750750
// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
751751
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
752752
// AVX512F Intrinsics
753-
HARDWARE_INTRINSIC(AVX512F, And, 64, 2, {INS_vpandd, INS_vpandd, INS_vpandd, INS_vpandd, INS_vpandd, INS_vpandd, INS_vpandq, INS_vpandq, INS_andps, INS_andpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
754-
HARDWARE_INTRINSIC(AVX512F, AndNot, 64, 2, {INS_vpandnd, INS_vpandnd, INS_vpandnd, INS_vpandnd, INS_vpandnd, INS_vpandnd, INS_vpandnq, INS_vpandnq, INS_andnps, INS_andnpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
753+
HARDWARE_INTRINSIC(AVX512F, And, 64, 2, {INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_pand, INS_vpandq, INS_vpandq, INS_andps, INS_andpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
754+
HARDWARE_INTRINSIC(AVX512F, AndNot, 64, 2, {INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_pandn, INS_vpandnq, INS_vpandnq, INS_andnps, INS_andnpd}, HW_Category_SimpleSIMD, HW_Flag_NoFlag)
755755
HARDWARE_INTRINSIC(AVX512F, BroadcastScalarToVector512, 64, 1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_vpbroadcastd, INS_vpbroadcastd, INS_vpbroadcastq, INS_vpbroadcastq, INS_vbroadcastss, INS_vbroadcastsd}, HW_Category_SIMDScalar, HW_Flag_MaybeMemoryLoad)
756756
HARDWARE_INTRINSIC(AVX512F, InsertVector256, 64, 3, {INS_vinserti64x4, INS_vinserti64x4, INS_vinserti64x4, INS_vinserti64x4, INS_vinserti64x4, INS_vinserti64x4, INS_vinserti64x4, INS_vinserti64x4, INS_vinsertf64x4, INS_vinsertf64x4}, HW_Category_IMM, HW_Flag_FullRangeIMM)
757-
HARDWARE_INTRINSIC(AVX512F, LoadAlignedVector512, 64, 1, {INS_vmovdqa32, INS_vmovdqa32, INS_vmovdqa32, INS_vmovdqa32, INS_vmovdqa32, INS_vmovdqa32, INS_vmovdqa64, INS_vmovdqa64, INS_movaps, INS_movapd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
757+
HARDWARE_INTRINSIC(AVX512F, LoadAlignedVector512, 64, 1, {INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_vmovdqa64, INS_vmovdqa64, INS_movaps, INS_movapd}, HW_Category_MemoryLoad, HW_Flag_NoRMWSemantics)
758758
HARDWARE_INTRINSIC(AVX512F, LoadAlignedVector512NonTemporal, 64, 1, {INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_movntdqa, INS_invalid, INS_invalid}, HW_Category_MemoryLoad, HW_Flag_NoFlag)
759-
HARDWARE_INTRINSIC(AVX512F, LoadVector512, 64, 1, {INS_vmovdqu32, INS_vmovdqu32, INS_vmovdqu32, INS_vmovdqu32, INS_vmovdqu32, INS_vmovdqu32, INS_vmovdqu64, INS_vmovdqu64, INS_movups, INS_movupd}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen)
760-
HARDWARE_INTRINSIC(AVX512F, Or, 64, 2, {INS_vpord, INS_vpord, INS_vpord, INS_vpord, INS_vpord, INS_vpord, INS_vporq, INS_vporq, INS_orps, INS_orpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
761-
HARDWARE_INTRINSIC(AVX512F, Store, 64, 2, {INS_vmovdqu32, INS_vmovdqu32, INS_vmovdqu32, INS_vmovdqu32, INS_vmovdqu32, INS_vmovdqu32, INS_vmovdqu64, INS_vmovdqu64, INS_movups, INS_movupd}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_BaseTypeFromSecondArg|HW_Flag_NoCodeGen)
762-
HARDWARE_INTRINSIC(AVX512F, StoreAligned, 64, 2, {INS_vmovdqa32, INS_vmovdqa32, INS_vmovdqa32, INS_vmovdqa32, INS_vmovdqa32, INS_vmovdqa32, INS_vmovdqa64, INS_vmovdqa64, INS_movaps, INS_movapd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
759+
HARDWARE_INTRINSIC(AVX512F, LoadVector512, 64, 1, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_vmovdqu64, INS_vmovdqu64, INS_movups, INS_movupd}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_NoCodeGen)
760+
HARDWARE_INTRINSIC(AVX512F, Or, 64, 2, {INS_por, INS_por, INS_por, INS_por, INS_por, INS_por, INS_vporq, INS_vporq, INS_orps, INS_orpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
761+
HARDWARE_INTRINSIC(AVX512F, Store, 64, 2, {INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_movdqu, INS_vmovdqu64, INS_vmovdqu64, INS_movups, INS_movupd}, HW_Category_Helper, HW_Flag_SpecialImport|HW_Flag_BaseTypeFromSecondArg|HW_Flag_NoCodeGen)
762+
HARDWARE_INTRINSIC(AVX512F, StoreAligned, 64, 2, {INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_movdqa, INS_vmovdqa64, INS_vmovdqa64, INS_movaps, INS_movapd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
763763
HARDWARE_INTRINSIC(AVX512F, StoreAlignedNonTemporal, 64, 2, {INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntdq, INS_movntps, INS_movntpd}, HW_Category_MemoryStore, HW_Flag_NoRMWSemantics|HW_Flag_BaseTypeFromSecondArg)
764-
HARDWARE_INTRINSIC(AVX512F, Xor, 64, 2, {INS_vpxord, INS_vpxord, INS_vpxord, INS_vpxord, INS_vpxord, INS_vpxord, INS_vpxorq, INS_vpxorq, INS_xorps, INS_xorpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
764+
HARDWARE_INTRINSIC(AVX512F, Xor, 64, 2, {INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_pxor, INS_vpxorq, INS_vpxorq, INS_xorps, INS_xorpd}, HW_Category_SimpleSIMD, HW_Flag_Commutative)
765765

766766
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
767767
// ISA Function name SIMD size NumArg Instructions Category Flags

‎src/coreclr/jit/instr.cpp

Lines changed: 81 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -101,13 +101,88 @@ const char* CodeGen::genInsDisplayName(emitter::instrDesc* id)
101101
static char buf[4][TEMP_BUFFER_LEN];
102102
const char* retbuf;
103103

104-
if (GetEmitter()->IsVexOrEvexEncodedInstruction(ins) && !GetEmitter()->IsBMIInstruction(ins) &&
105-
!GetEmitter()->IsKInstruction(ins))
104+
const emitter* emit = GetEmitter();
105+
106+
if (emit->IsVexOrEvexEncodedInstruction(ins))
106107
{
107-
sprintf_s(buf[curBuf], TEMP_BUFFER_LEN, "v%s", insName);
108-
retbuf = buf[curBuf];
109-
curBuf = (curBuf + 1) % 4;
110-
return retbuf;
108+
if (!emit->IsBMIInstruction(ins) && !emit->IsKInstruction(ins))
109+
{
110+
if (emit->TakesEvexPrefix(id))
111+
{
112+
switch (ins)
113+
{
114+
case INS_movdqa:
115+
{
116+
return "vmovdqa32";
117+
}
118+
119+
case INS_movdqu:
120+
{
121+
return "vmovdqu32";
122+
}
123+
124+
case INS_pand:
125+
{
126+
return "vpandd";
127+
}
128+
129+
case INS_pandn:
130+
{
131+
return "vpandnd";
132+
}
133+
134+
case INS_por:
135+
{
136+
return "vpord";
137+
}
138+
139+
case INS_pxor:
140+
{
141+
return "vpxord";
142+
}
143+
144+
case INS_vbroadcastf128:
145+
{
146+
return "vbroadcastf32x4";
147+
}
148+
149+
case INS_vextractf128:
150+
{
151+
return "vextractf32x4";
152+
}
153+
154+
case INS_vinsertf128:
155+
{
156+
return "vinsertf32x4";
157+
}
158+
159+
case INS_vbroadcasti128:
160+
{
161+
return "vbroadcasti32x4";
162+
}
163+
164+
case INS_vextracti128:
165+
{
166+
return "vextracti32x4";
167+
}
168+
169+
case INS_vinserti128:
170+
{
171+
return "vinserti32x4";
172+
}
173+
174+
default:
175+
{
176+
break;
177+
}
178+
}
179+
}
180+
181+
sprintf_s(buf[curBuf], TEMP_BUFFER_LEN, "v%s", insName);
182+
retbuf = buf[curBuf];
183+
curBuf = (curBuf + 1) % 4;
184+
return retbuf;
185+
}
111186
}
112187

113188
// Some instructions have different mnemonics depending on the size.

‎src/coreclr/jit/instr.h

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -119,7 +119,7 @@ enum insFlags : uint64_t
119119
// Resets
120120
Resets_OF = 1ULL << 12,
121121
Resets_SF = 1ULL << 13,
122-
Resets_ZF = 1ULL << 41,
122+
Resets_ZF = 1ULL << 39,
123123
Resets_AF = 1ULL << 14,
124124
Resets_PF = 1ULL << 15,
125125
Resets_CF = 1ULL << 16,
@@ -171,12 +171,8 @@ enum insFlags : uint64_t
171171
Encoding_VEX = 1ULL << 37,
172172
Encoding_EVEX = 1ULL << 38,
173173

174-
// whether VEX or EVEX encodings are indirectly supported
175-
Translate_VEX = 1ULL << 39,
176-
Translate_EVEX = 1ULL << 40,
177-
178174
// Listed above so it is "inline" with the other Resets_* flags
179-
// Resets_ZF = 1ULL << 41,
175+
// Resets_ZF = 1ULL << 39,
180176

181177
// TODO-Cleanup: Remove this flag and its usage from TARGET_XARCH
182178
INS_FLAGS_DONT_CARE = 0x00ULL,

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