Ensure canUseVexEncoding is true when ForceEVEXEncoding is set

Author: tannergooding

src/coreclr/jit/compiler.h

@@ -9197,6 +9197,13 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 #ifdef TARGET_XARCH
     bool canUseVexEncoding() const
     {
+#ifdef DEBUG
+        if (JitConfig.JitForceEVEXEncoding())
+        {
+            return true;
+        }
+#endif // DEBUG
+
         return compOpportunisticallyDependsOn(InstructionSet_AVX);
     }
 

src/coreclr/jit/emitxarch.cpp

@@ -1033,23 +1033,27 @@ bool emitter::TakesSimdPrefix(const instrDesc* id) const
 //
 bool emitter::TakesEvexPrefix(const instrDesc* id) const
 {
-    if (!emitComp->DoJitStressEvexEncoding())
+    instruction ins = id->idIns();
+
+    if (!IsEvexEncodedInstruction(ins))
     {
         return false;
     }
 
-    instruction ins = id->idIns();
+    if (!emitComp->DoJitStressEvexEncoding())
+    {
+        return false;
+    }
 
     if (HasHighSIMDReg(id))
     {
-        assert(IsEvexEncodedInstruction(ins));
         // TODO-XARCH-AVX512 remove this check once k registers have been implemented
         assert(!HasKMaskRegisterDest(ins));
         return true;
     }
 
     // TODO-XArch-AVX512: Revisit 'HasKMaskRegisterDest()' check once KMask support is added.
-    return IsEvexEncodedInstruction(ins) && !HasKMaskRegisterDest(ins);
+    return !HasKMaskRegisterDest(ins);
 }
 
 // Intel AVX-512 encoding is defined in "Intel 64 and ia-32 architectures software developer's manual volume 2", Section