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2 parents caf378e + e991441 commit 95eb6bdCopy full SHA for 95eb6bd
src/verilog/Makefile
@@ -61,4 +61,4 @@ verilog_preprocessor_lex.yy.cpp: verilog_preprocessor_tokenizer.l
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# extra dependencies
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verilog_y.tab$(OBJEXT): verilog_y.tab.cpp verilog_y.tab.h
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verilog_lex.yy$(OBJEXT): verilog_y.tab.cpp verilog_lex.yy.cpp verilog_y.tab.h
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-
+verilog_scope$(OBJEXT): verilog_y.tab.h
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