[wasm] Bump chrome for testing - linux: 119.0.6045.159, windows: 119.0.6045.160 #32
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
![github-actions[bot]](https://avatars.githubusercontent.com/in/15368?s=60&v=4){kind=small}
davidwrighton
pushed a commit
that referenced
this pull request
Mar 11, 2025
…3178) Based on the new `FIELD_LIST` support for returns this PR adds support for the JIT to combine smaller fields via bitwise operations when returned, instead of spilling these to stack. win-x64 examples: ```csharp static int? Test() { return Environment.TickCount; } ``` ```diff call System.Environment:get_TickCount():int - mov dword ptr [rsp+0x24], eax - mov byte ptr [rsp+0x20], 1 - mov rax, qword ptr [rsp+0x20] - ;; size=19 bbWeight=1 PerfScore 4.00 + mov eax, eax + shl rax, 32 + or rax, 1 + ;; size=15 bbWeight=1 PerfScore 2.00 ``` (the `mov eax, eax` is unnecessary, but not that simple to get rid of) ```csharp static (int x, float y) Test(int x, float y) { return (x, y); } ``` ```diff - mov dword ptr [rsp], ecx - vmovss dword ptr [rsp+0x04], xmm1 - mov rax, qword ptr [rsp] + vmovd eax, xmm1 + shl rax, 32 + mov ecx, ecx + or rax, rcx ;; size=13 bbWeight=1 PerfScore 3.00 ``` An arm64 example: ```csharp static Memory<int> ToMemory(int[] arr) { return arr.AsMemory(); } ``` ```diff G_M45070_IG01: ;; offset=0x0000 - stp fp, lr, [sp, #-0x20]! + stp fp, lr, [sp, #-0x10]! mov fp, sp - str xzr, [fp, #0x10] // [V03 tmp2] - ;; size=12 bbWeight=1 PerfScore 2.50 -G_M45070_IG02: ;; offset=0x000C + ;; size=8 bbWeight=1 PerfScore 1.50 +G_M45070_IG02: ;; offset=0x0008 cbz x0, G_M45070_IG06 ;; size=4 bbWeight=1 PerfScore 1.00 -G_M45070_IG03: ;; offset=0x0010 - str x0, [fp, #0x10] // [V07 tmp6] - str wzr, [fp, #0x18] // [V08 tmp7] - ldr x0, [fp, #0x10] // [V07 tmp6] - ldr w0, [x0, #0x08] - str w0, [fp, #0x1C] // [V09 tmp8] - ;; size=20 bbWeight=0.80 PerfScore 6.40 -G_M45070_IG04: ;; offset=0x0024 - ldp x0, x1, [fp, #0x10] // [V03 tmp2], [V03 tmp2+0x08] - ;; size=4 bbWeight=1 PerfScore 3.00 -G_M45070_IG05: ;; offset=0x0028 - ldp fp, lr, [sp], #0x20 +G_M45070_IG03: ;; offset=0x000C + ldr w1, [x0, #0x08] + ;; size=4 bbWeight=0.80 PerfScore 2.40 +G_M45070_IG04: ;; offset=0x0010 + mov w1, w1 + mov x2, xzr + orr x1, x2, x1, LSL #32 + ;; size=12 bbWeight=1 PerfScore 2.00 +G_M45070_IG05: ;; offset=0x001C + ldp fp, lr, [sp], #0x10 ret lr ;; size=8 bbWeight=1 PerfScore 2.00 -G_M45070_IG06: ;; offset=0x0030 - str xzr, [fp, #0x10] // [V07 tmp6] - str xzr, [fp, #0x18] +G_M45070_IG06: ;; offset=0x0024 + mov x0, xzr + mov w1, wzr b G_M45070_IG04 - ;; size=12 bbWeight=0.20 PerfScore 0.60 + ;; size=12 bbWeight=0.20 PerfScore 0.40 ``` (sneak peek -- this codegen requires some supplementary changes, and there's additional opportunities here) This is the return counterpart to dotnet#112740. That PR has a bunch of regressions that makes it look like we need to support returns/call arguments first, before we try to support parameters. There's a few follow-ups here: - Support for float->float insertions (when a float value needs to be returned as the 1st, 2nd, .... field of a SIMD register) - Support for coalescing memory loads, particularly because the fields of the `FIELD_LIST` come from a promoted struct that ended up DNER. In those cases we should be able to recombine the fields back to a single large field, instead of combining them with bitwise operations. - Support for constant folding the bitwise insertions. This requires some more constant folding support in lowering. - The JIT has lots of (now outdated) restrictions based around multi-reg returns that get in the way. Lifting these should improve things considerably.
davidwrighton
pushed a commit
that referenced
this pull request
May 30, 2025
Add support using bitwise operations to reconstruct registers passed
into calls from multiple promoted fields. Remove the IR invariant that
`FIELD_LIST` args must always map cleanly to registers; instead, any
`FIELD_LIST` is allowed for register-only arguments before lowering, and
lowering takes care to normalize them into a handled shape.
`fgTryMorphStructArg` is changed to take advantage of this by now
producing `FIELD_LIST` even when a promoted arg does not match the
target ABI. Support in physical promotion will be added in a follow up.
Split arguments are not handled and retain the old IR invariant of
requiring registers and stack slots to make cleanly from `FIELD_LIST`.
win-x64 examples:
```csharp
static void Foo(int x)
{
Use<int?>(x);
Use<int?>(5);
Use<int?>(null);
}
```
```diff
G_M7200_IG02: ;; offset=0x0004
- mov byte ptr [rsp+0x20], 1
- mov dword ptr [rsp+0x24], ecx
- mov rcx, qword ptr [rsp+0x20]
+ mov ecx, ecx
+ shl rcx, 32
+ or rcx, 1
call [Program:Bar(System.Nullable`1[int])]
- mov dword ptr [rsp+0x24], 5
- mov rcx, qword ptr [rsp+0x20]
+ mov rcx, 0x500000001
call [Program:Bar(System.Nullable`1[int])]
- mov byte ptr [rsp+0x20], 0
xor ecx, ecx
- mov dword ptr [rsp+0x24], ecx
- mov rcx, qword ptr [rsp+0x20]
- ;; size=55 bbWeight=1 PerfScore 14.25
+ ;; size=34 bbWeight=1 PerfScore 7.50
G_M7200_IG03:
add rsp, 40
tail.jmp [Program:Bar(System.Nullable`1[int])]
;; size=10 bbWeight=1 PerfScore 2.25
```
```csharp
static void Foo(int x, float y)
{
Use((x, y));
}
```
```diff
G_M42652_IG01: ;; offset=0x0000
- push rax
- ;; size=1 bbWeight=1 PerfScore 1.00
+ ;; size=0 bbWeight=1 PerfScore 0.00
G_M42652_IG02:
- mov dword ptr [rsp], ecx
- vmovss dword ptr [rsp+0x04], xmm1
- mov rcx, qword ptr [rsp]
+ vmovd eax, xmm1
+ shl rax, 32
+ mov ecx, ecx
+ or rcx, rax
;; size=13 bbWeight=1 PerfScore 3.00
G_M42652_IG03:
- add rsp, 8
tail.jmp [Program:Use[System.ValueTuple`2[int,float]](System.ValueTuple`2[int,float])]
```
A win-arm64 example:
```csharp
static void Foo(int[] arr)
{
Use(arr.AsMemory());
}
```
```diff
G_M33990_IG01:
- stp fp, lr, [sp, #-0x20]!
+ stp fp, lr, [sp, #-0x10]!
mov fp, sp
- str xzr, [fp, #0x10] // [V03 tmp2]
- ;; size=12 bbWeight=1 PerfScore 2.50
+ ;; size=8 bbWeight=1 PerfScore 1.50
G_M33990_IG02:
cbz x0, G_M33990_IG04
;; size=4 bbWeight=1 PerfScore 1.00
G_M33990_IG03:
- str x0, [fp, #0x10] // [V07 tmp6]
- str wzr, [fp, #0x18] // [V08 tmp7]
- ldr w0, [x0, #0x08]
- str w0, [fp, #0x1C] // [V09 tmp8]
+ ldr w1, [x0, #0x08]
b G_M33990_IG05
- ;; size=20 bbWeight=0.50 PerfScore 3.50
+ ;; size=8 bbWeight=0.50 PerfScore 2.00
G_M33990_IG04:
- str xzr, [fp, #0x10] // [V07 tmp6]
- str xzr, [fp, #0x18]
- ;; size=8 bbWeight=0.50 PerfScore 1.00
+ mov x0, xzr
+ mov w1, wzr
+ ;; size=8 bbWeight=0.50 PerfScore 0.50
G_M33990_IG05:
- ldp x0, x1, [fp, #0x10] // [V03 tmp2], [V03 tmp2+0x08]
- movz x2, #0xD920 // code for Program:Use[System.Memory`1[int]](System.Memory`1[int])
- movk x2, #0x4590 LSL #16
+ mov w1, w1
+ lsl x1, x1, #32
+ movz x2, #0xD950 // code for Program:Use[System.Memory`1[int]](System.Memory`1[int])
+ movk x2, #0x4592 LSL #16
movk x2, #0x7FFE LSL #32
ldr x2, [x2]
- ;; size=20 bbWeight=1 PerfScore 7.50
+ ;; size=24 bbWeight=1 PerfScore 6.00
G_M33990_IG06:
- ldp fp, lr, [sp], #0x20
+ ldp fp, lr, [sp], #0x10
br x2
;; size=8 bbWeight=1 PerfScore 2.00
-; Total bytes of code: 72
+; Total bytes of code: 60
```
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
No description provided.