do not use this commit. It doesn't work. There are many better option…

…s. Consider the main branch :)

src/main/scala/pipedsl/Main.scala

@@ -67,8 +67,8 @@ object Main {
     try {
       val verifProg = AddVerifyValuesPass.run(prog)
       val canonProg = new CanonicalizePass().run(verifProg)
-      val basetypes = (new TypeInference).checkProgram(canonProg)
-//      val basetypes = BaseTypeChecker.check(canonProg, None)
+      /*val basetypes = */(new TypeInference).checkProgram(canonProg)
+      val basetypes = BaseTypeChecker.check(canonProg, None)
       val nprog = new BindModuleTypes(basetypes).run(canonProg)
       TimingTypeChecker.check(nprog, Some(basetypes))
       MarkNonRecursiveModulePass.run(nprog)

src/main/scala/pipedsl/Parser.scala

@@ -33,7 +33,11 @@ class Parser extends RegexParsers with PackratParsers {
 
   private def toInt(n: Int, base: Int, bits: Option[Int], isUnsigned: Boolean): EInt = {
     val e = EInt(n, base, if (bits.isDefined) bits.get else log2(n))
-    e.typ = Some(TSizedInt(TBitWidthLen(e.bits), unsigned = isUnsigned))
+    e.typ = bits match {
+      case Some(b) => Some(TSizedInt(TBitWidthLen(b), SignFactory.ofBool(!isUnsigned)))
+      case None => None
+    }
+   // e.typ = Some(TSizedInt(TBitWidthLen(e.bits), unsigned = isUnsigned))
     e
   }
 
@@ -260,8 +264,8 @@ class Parser extends RegexParsers with PackratParsers {
       seqCmd
   }
 
-  lazy val sizedInt: P[Type] = "int" ~> angular(posint) ^^ { bits => TSizedInt(TBitWidthLen(bits), unsigned = false) } |
-  "uint" ~> angular(posint) ^^ { bits => TSizedInt(TBitWidthLen(bits), unsigned = true) }
+  lazy val sizedInt: P[Type] = "int" ~> angular(posint) ^^ { bits => TSizedInt(TBitWidthLen(bits), TUnsigned() /*unsigned = false*/) } |
+  "uint" ~> angular(posint) ^^ { bits => TSizedInt(TBitWidthLen(bits), TUnsigned() /*unsigned = true*/) }
 
   lazy val latency: P[Latency.Latency] =
     "c" ^^ { _ => Latency.Combinational } |

src/main/scala/pipedsl/codegen/bsv/BSVSyntax.scala

@@ -80,7 +80,7 @@ object BSVSyntax {
           mtyp.tparams.find(bv => bv.name == bsints.reqIdName).get.typ
         }
         getLockedMemType(mem, mtyp, lidtyp, limpl, useTypeVars = false, None)
-      case TSizedInt(len, unsigned) => BSizedInt(unsigned, len.asInstanceOf[TBitWidthLen].len)
+      case TSizedInt(len, unsigned) => BSizedInt(unsigned.unsigned(), len.asInstanceOf[TBitWidthLen].len)
       case TBool() => BBool
       case TString() => BString
       case TModType(_, _, _, Some(n)) => modmap(n)
@@ -180,10 +180,10 @@ object BSVSyntax {
       val baseExpr = toExpr(e)
       val needsExtend = from.len.asInstanceOf[TBitWidthLen].len < to.len.asInstanceOf[TBitWidthLen].len
       val needsTruncate = to.len.asInstanceOf[TBitWidthLen].len < from.len.asInstanceOf[TBitWidthLen].len
-      val needsPack = from.unsigned != to.unsigned
+      val needsPack = from.sign != to.sign
       val extended = if (needsExtend) {
         //If making a signed number, sign extend
-        BExtend(baseExpr, useSign = !to.unsigned)
+        BExtend(baseExpr, useSign = to.sign.signed())
       } else if (needsTruncate) {
         BTruncate(baseExpr)
       } else {
@@ -215,7 +215,7 @@ object BSVSyntax {
         BBOp("*",toExpr(b.e1), toExpr(b.e2))
       case NumOp("*",_) => b.typ match {
         case Some(TSizedInt(_, unsigned)) =>
-          val op = if (unsigned) { "unsignedMul" } else { "signedMul" }
+          val op = if (unsigned.unsigned()) { "unsignedMul" } else { "signedMul" }
           BBOp(op, toExpr(b.e1), toExpr(b.e2), isInfix = false)
         case None => throw MissingType(b.pos, "Missing Type on Multiply BinOp")
         case _ => throw UnexpectedType(b.pos, "Mul Op", "Sized Integers", b.typ.get)

src/main/scala/pipedsl/common/DAGSyntax.scala

@@ -276,13 +276,13 @@ object DAGSyntax {
     val defaultNum = conds.size
     val condVar = EVar(Id("__cond" + n.v))
     val intSize = log2(defaultNum)
-    condVar.typ = Some(TSizedInt(TBitWidthLen(intSize), unsigned = true))
+    condVar.typ = Some(TSizedInt(TBitWidthLen(intSize), sign = true))
     condVar.id.typ = condVar.typ
     var eTernary = ETernary(conds(defaultNum - 1), EInt(defaultNum - 1, bits = intSize), EInt(defaultNum, bits = intSize))
     for(i <- defaultNum-2 to 0 by -1 ) {
       eTernary = ETernary(conds(i), EInt(i, bits = intSize), eTernary.copy())
     }
-    this.addCmd(CAssign(condVar, eTernary, Some(TSizedInt(TBitWidthLen(intSize), unsigned = true))))
+    this.addCmd(CAssign(condVar, eTernary, Some(TSizedInt(TBitWidthLen(intSize), sign = true))))
     for (i <- 0 until defaultNum) {
       this.addEdgeTo(condStages(i).head, condSend = Some (EBinop(EqOp("=="), condVar, EInt(i, bits = intSize))))
       condStages(i).last.addEdgeTo(joinStage, condRecv = Some (EBinop(EqOp("=="), condVar, EInt(i, bits = intSize))))

src/main/scala/pipedsl/common/Syntax.scala

@@ -89,7 +89,7 @@ object Syntax {
       case _: TVoid => "void"
       case _: TBool => "bool"
       case _: TString => "String"
-      case TSizedInt(l, un) => s"${if (un) "u" else ""}bit<$l>"
+      case TSizedInt(l, un) => s"${if (un.unsigned()) "u" else ""}bit<$l>"
       case TFun(args, ret) => s"${args.mkString("->")} -> ${ret}"
       case TRecType(n, _) => s"$n"
       case TMemType(elem, size, rLat, wLat, rPorts, wPorts) =>
@@ -101,15 +101,37 @@ object Syntax {
       case TMaybe(btyp) => s"Maybe<${btyp}>"
       case TNamedType(n) => n.toString
       case TBitWidthAdd(b1, b2) => "add(" + b1 + ", " + b2 + ")"
-      case TBitWidthLen(len) => len.toString()
+      case TBitWidthLen(len) => len.toString
       case TBitWidthMax(b1, b2) => "max(" + b1 + ", " + b2 + ")"
       case TBitWidthVar(name) => "bitVar(" + name + ")"
 
     }
   }
   // Types that can be upcast to Ints
   sealed trait IntType
-  case class TSizedInt(len: TBitWidth, unsigned: Boolean) extends Type with IntType
+  trait TSignedNess extends Type
+  {
+    def signed() :Boolean = this match
+    {
+      case TSigned() => true
+      case TUnsigned() => false
+    }
+    def unsigned() :Boolean = this match {
+      case TSigned() => false
+      case TUnsigned() => true
+    }
+  }
+  object SignFactory
+  {
+    def ofBool(signed :Boolean) :TSignedNess =
+      {
+        if(signed) TSigned() else TUnsigned()
+      }
+  }
+  case class TSigned() extends TSignedNess
+  case class TUnsigned() extends TSignedNess
+  case class TSignVar(id :Id) extends TSignedNess
+  case class TSizedInt(len: TBitWidth, sign: TSignedNess) extends Type with IntType
   // Use case class instead of case object to get unique positions
   case class TString() extends Type
   case class TVoid() extends Type

src/main/scala/pipedsl/typechecker/BaseTypeChecker.scala

@@ -301,7 +301,7 @@ object BaseTypeChecker extends TypeChecks[Id, Type] {
           else {
             val (idxt, _) =  checkExpression(mem.evar.get, tenv, None)
             idxt match {
-              case TSizedInt(l, true) if l.asInstanceOf[TBitWidthLen].len == memt.addrSize => tenv
+              case TSizedInt(l, TUnsigned()/*true*/) if l.asInstanceOf[TBitWidthLen].len == memt.addrSize => tenv
               case _ => throw UnexpectedType(mem.pos, "lock operation", "ubit<" + memt.addrSize + ">", idxt)
             }
           }
@@ -385,7 +385,7 @@ object BaseTypeChecker extends TypeChecks[Id, Type] {
   private def _checkE(e: Expr, tenv: Environment[Id, Type], defaultType: Option[Type]): (Type, Environment[Id, Type] ) = e match {
     case e1@EInt(_, _, bits) =>
       if (e1.typ.isDefined) { (e1.typ.get, tenv) }
-      else { (TSizedInt(TBitWidthLen(bits), unsigned = false), tenv) }
+      else { (TSizedInt(TBitWidthLen(bits), TSigned()/*unsigned = false*/), tenv) }
     case EBool(v) => (TBool(), tenv)
     case EString(v) => (TString(), tenv)
     case EUop(op, e) => {
@@ -446,12 +446,12 @@ object BaseTypeChecker extends TypeChecks[Id, Type] {
       mem.typ = Some(memt)
       val (idxt, env1) = checkExpression(index, tenv, None)
       (memt, idxt) match {
-        case (TLockedMemType(TMemType(e, s, _, _, _, _),_,_), TSizedInt(l, true)) if l.asInstanceOf[TBitWidthLen].len == s =>
+        case (TLockedMemType(TMemType(e, s, _, _, _, _),_,_), TSizedInt(l, TUnsigned()/*true*/)) if l.asInstanceOf[TBitWidthLen].len == s =>
           if (wm.isDefined) {
             val (wmt, _) = checkExpression(wm.get, tenv, None)
             wmt match {
               //TODO check that the mask size is correct (i.e., length of elemtype / 8)
-              case TSizedInt(lm, true) => ()
+              case TSizedInt(lm, TUnsigned()/*true*/) => ()
               case _ => throw UnexpectedType(wm.get.pos, "Write Mask", "Mask must be unsigned and has length equal" +
                 " to the number of bytes in the element type", wmt)
             }

src/main/scala/pipedsl/typechecker/Subtypes.scala

@@ -42,8 +42,8 @@ object Subtypes {
     }
 
     def areEqual(t1: Type, t2: Type): Boolean =  (t1, t2) match {
-        case (TSizedInt(l1, u1), TBool()) => l1.asInstanceOf[TBitWidthLen].len == 1 && u1
-        case (TBool(), TSizedInt(l1, u1)) => l1.asInstanceOf[TBitWidthLen].len == 1 && u1
+        case (TSizedInt(l1, u1), TBool()) => l1.asInstanceOf[TBitWidthLen].len == 1 && u1.asInstanceOf[TSignedNess].unsigned()
+        case (TBool(), TSizedInt(l1, u1)) => l1.asInstanceOf[TBitWidthLen].len == 1 && u1.asInstanceOf[TSignedNess].unsigned()
         case (TSizedInt(l1, u1), TSizedInt(l2, u2)) => l1 == l2 && u1 == u2
         case (TMemType(e1, as1, r1, w1, rp1, wp1),
         TMemType(e2, as2, r2, w2, rp2, wp2))

src/main/scala/pipedsl/typechecker/TypeInferenceWrapper.scala

@@ -27,7 +27,8 @@ object TypeInferenceWrapper
    { case Some(value) => Some(subst_into_type(typevar, toType, value))
     case None => None
    }, name)
-   case t: TBitWidth => t match
+   case t: TBitWidth =>
+    t match
    {
     case TBitWidthVar(name) => if (name == typevar) toType else inType
     case TBitWidthLen(len) => inType
@@ -37,10 +38,13 @@ object TypeInferenceWrapper
       case (TBitWidthLen(len1), TBitWidthLen(len2)) => TBitWidthLen(len1 + len2)
       case _ => t1
      }
-    case TBitWidthMax(b1, b2) => val t1 = TBitWidthMax(subst_into_type(typevar, toType, b1).asInstanceOf[TBitWidth], subst_into_type(typevar, toType, b2).asInstanceOf[TBitWidth])
+    case TBitWidthMax(b1, b2) =>
+     val t1 = TBitWidthMax(subst_into_type(typevar, toType, b1).asInstanceOf[TBitWidth], subst_into_type(typevar, toType, b2).asInstanceOf[TBitWidth])
      (t1.b1, t1.b2) match
      {
       case (TBitWidthLen(len1), TBitWidthLen(len2)) => TBitWidthLen(len1.max(len2))
+      case (TBitWidthLen(len), _ :TBitWidthVar) => TBitWidthLen(len)
+      case (_ :TBitWidthVar, TBitWidthLen(len)) => TBitWidthLen(len)
       case _ => t1
      }
    }
@@ -202,7 +206,7 @@ object TypeInferenceWrapper
           case Some(value) => val (s, t, e) = infer(env, value)
            val tempSub = compose_subst(sub, s)
            val tNew = apply_subst_typ(tempSub, t)
-           val newSub = compose_subst(tempSub, unify(tNew, TSizedInt(TBitWidthLen(addrSize), unsigned = true)))
+           val newSub = compose_subst(tempSub, unify(tNew, TSizedInt(TBitWidthLen(addrSize), TUnsigned()/*unsigned = true*/)))
            (e.apply_subst_typeenv(newSub), newSub)
           case None => (env, sub)
          }
@@ -211,7 +215,7 @@ object TypeInferenceWrapper
           case Some(value) => val (s, t, e) = infer(env, value)
            val tempSub = compose_subst(sub, s)
            val tNew = apply_subst_typ(tempSub, t)
-           val newSub = compose_subst(tempSub, unify(tNew, TSizedInt(TBitWidthLen(addrSize), unsigned = true)))
+           val newSub = compose_subst(tempSub, unify(tNew, TSizedInt(TBitWidthLen(addrSize), TUnsigned()/*unsigned = true*/)))
            (e.apply_subst_typeenv(newSub), newSub)
           case None => (env, sub)
          }
@@ -342,6 +346,12 @@ object TypeInferenceWrapper
       TBitWidthVar(Id("__BITWIDTH__" + counter))
      }
 
+    private def generateSignTypeVar(): TSignedNess =
+     {
+      counter += 1
+      TSignVar(Id("__SIGN__" + counter))
+     }
+
     private def occursIn(name: Id, b: Type): Boolean = b match
     {
      case TSizedInt(len, unsigned) => occursIn(name, len)
@@ -374,10 +384,11 @@ object TypeInferenceWrapper
      case (_: TString, _: TString) => List()
      case (_: TBool, _: TBool) => List()
      case (_: TVoid, _: TVoid) => List()
-     case (TBool(), TSizedInt(len, u)) if len.asInstanceOf[TBitWidthLen].len == 1 && u => List()
-     case (TSizedInt(len, u), TBool()) if len.asInstanceOf[TBitWidthLen].len == 1 && u => List()
+     case (TBool(), TSizedInt(len, u)) if len.asInstanceOf[TBitWidthLen].len == 1 && u.unsigned() => List()
+     case (TSizedInt(len, u), TBool()) if len.asInstanceOf[TBitWidthLen].len == 1 && u.unsigned() => List()
      case (TSizedInt(len1, unsigned1), TSizedInt(len2, unsigned)) => unify(len1, len2) //TODO: TSIZEDINT
-     case (TFun(args1, ret1), TFun(args2, ret2)) if args1.length == args2.length => val s1 = args1.zip(args2).foldLeft[Subst](List())((s, t) => compose_subst(s, unify(apply_subst_typ(s, t._1), apply_subst_typ(s, t._2))))
+     case (TFun(args1, ret1), TFun(args2, ret2)) if args1.length == args2.length =>
+      val s1 = args1.zip(args2).foldLeft[Subst](List())((s, t) => compose_subst(s, unify(apply_subst_typ(s, t._1), apply_subst_typ(s, t._2))))
       compose_subst(s1, unify(apply_subst_typ(s1, ret1), apply_subst_typ(s1, ret2)))
      case (TModType(input1, refs1, retType1, name1), TModType(input2, refs2, retType2, name2)) => //TODO: Name?\ if (name1 != name2) throw UnificationError(a, b)
       val s1 = input1.zip(input2).foldLeft[Subst](List())((s, t) => compose_subst(s, unify(apply_subst_typ(s, t._1), apply_subst_typ(s, t._2))))
@@ -400,8 +411,9 @@ object TypeInferenceWrapper
     //The environment returned is guaratneed to already have been substituted into with the returned substitution private
     def infer(env: TypeEnv, e: Expr): (Subst, Type, TypeEnv) = e match
     {
-     case EInt(v, base, bits) => val is_unsigned = e.typ.get.asInstanceOf[TSizedInt].unsigned
-      (List(), TSizedInt(TBitWidthLen(bits), is_unsigned), env)
+     case EInt(v, base, bits) =>
+      val is_unsigned = if (e.typ.isDefined) e.typ.get.asInstanceOf[TSizedInt].sign else generateSignTypeVar()
+      (List(), if(e.typ.isDefined) TSizedInt(TBitWidthLen(bits), is_unsigned) else generateTypeVar(), env)
      case EString(v) => (List(), TString(), env)
      case EBool(v) => (List(), TBool(), env)
      case EUop(op, ex) => val (s, t, env1) = infer(env, ex)
@@ -411,15 +423,24 @@ object TypeInferenceWrapper
       val retSubst = compose_subst(s, subst)
       val retTyp = apply_subst_typ(retSubst, retType)
       (retSubst, retTyp, env1.apply_subst_typeenv(retSubst))
-     case EBinop(op, e1, e2) => val (s1, t1, env1) = infer(env, e1)
+     case EBinop(op, e1, e2) =>
+      println(s"inferring for op $op")
+      val (s1, t1, env1) = infer(env, e1)
       val (s2, t2, env2) = infer(env1, e2)
+      println(s"inferred left = $t1; right = $t2")
       val retType = generateTypeVar()
       val subTemp = compose_subst(s1, s2)
       val t1New = apply_subst_typ(subTemp, t1)
       val t2New = apply_subst_typ(subTemp, t2)
+      println(s"t1New: $t1New; t2New: $t2New")
       val subst = unify(TFun(List(t1New, t2New), retType), binOpExpectedType(op))
       val retSubst = compose_many_subst(subTemp, subst)
       val retTyp = apply_subst_typ(retSubst, retType)
+      val t1VNew = apply_subst_typ(retSubst, t1New)
+      val t2VNew = apply_subst_typ(retSubst, t2New)
+      e1.typ = Some(t1VNew)
+      e2.typ = Some(t2VNew)
+      println(s"retTyp: $retTyp;\nt1VNew: $t1VNew;\nt2VNew: $t2VNew")
       (retSubst, retTyp, env2.apply_subst_typeenv(retSubst))
      case EMemAccess(mem, index, wmask) => if (!(env(mem).isInstanceOf[TMemType] || env(mem).isInstanceOf[TLockedMemType])) throw UnexpectedType(e.pos, "Memory Access", "TMemtype", env(mem))
 
@@ -439,8 +460,9 @@ object TypeInferenceWrapper
      case EBitExtract(num, start, end) => val (s, t, e) = infer(env, num)
       t match
       {
-       case TSizedInt(TBitWidthLen(len), unsigned) if len >= (math.abs(end - start) + 1) => (s, TSizedInt(TBitWidthLen(math.abs(end - start) + 1), true), e)
-       case b => throw UnificationError(b, TSizedInt(TBitWidthLen(32), true)) //TODO Add better error message
+       case TSizedInt(TBitWidthLen(len), unsigned) if len >= (math.abs(end - start) + 1) => 
+        (s, TSizedInt(TBitWidthLen(math.abs(end - start) + 1), TUnsigned()/*true*/), e)
+       case b => throw UnificationError(b, TSizedInt(TBitWidthLen(32), TUnsigned()/*true*/)) //TODO Add better error message
       } //TODO
      case ETernary(cond, tval, fval) => val (sc, tc, env1) = infer(env, cond)
       val (st, tt, env2) = infer(env1, tval)
@@ -504,34 +526,42 @@ object TypeInferenceWrapper
     {
      case EqOp(op) => val t = generateTypeVar() // TODO: This can be anything?
       TFun(List(t, t), TBool())
-     case CmpOp(op) => TFun(List(TSizedInt(generateBitWidthTypeVar(), true), TSizedInt(generateBitWidthTypeVar(), true)), TBool()) //TODO: TSizedInt?
+     case CmpOp(op) => 
+      val t = generateSignTypeVar()
+      TFun(List(TSizedInt(generateBitWidthTypeVar(), t), TSizedInt(generateBitWidthTypeVar(), t)), TBool()) //TODO: TSizedInt?
      case BoolOp(op, fun) => TFun(List(TBool(), TBool()), TBool())
      case NumOp(op, fun) => val b1 = generateBitWidthTypeVar()
       val b2 = generateBitWidthTypeVar()
+      val s = generateSignTypeVar()
       op match
       {
-       case "/" => TFun(List(TSizedInt(b1, true), TSizedInt(b2, true)), TSizedInt(b1, true))
-       case "*" => TFun(List(TSizedInt(b1, true), TSizedInt(b2, true)), TSizedInt(TBitWidthAdd(b1, b2), true))
-       case "+" => TFun(List(TSizedInt(b1, true), TSizedInt(b2, true)), TSizedInt(TBitWidthMax(b1, b2), true))
-       case "-" => TFun(List(TSizedInt(b1, true), TSizedInt(b2, true)), TSizedInt(TBitWidthMax(b1, b2), true))
-       case "%" => TFun(List(TSizedInt(b1, true), TSizedInt(b2, true)), TSizedInt(b1, true))
+       case "/" => TFun(List(TSizedInt(b1, s), TSizedInt(b2, s)), TSizedInt(b1, s))
+       case "*" => TFun(List(TSizedInt(b1, s), TSizedInt(b2, s)), TSizedInt(TBitWidthAdd(b1, b2), s))
+      // case "+" => TFun(List(TSizedInt(b1, true), TSizedInt(b2, true)), TSizedInt(TBitWidthMax(b1, b2), true))
+       case "+" => TFun(List(TSizedInt(b1, s), TSizedInt(b1, s)), TSizedInt(b1, s))
+       //case "-" => TFun(List(TSizedInt(b1, true), TSizedInt(b2, true)), TSizedInt(TBitWidthMax(b1, b2), true))
+       case "-" => TFun(List(TSizedInt(b1, s), TSizedInt(b1, s)), TSizedInt(b1, s))
+       case "%" => TFun(List(TSizedInt(b1, s), TSizedInt(b2, s)), TSizedInt(b1, s))
       }
      case BitOp(op, fun) => val b1 = generateBitWidthTypeVar()
       val b2 = generateBitWidthTypeVar()
+      val s = generateSignTypeVar()
       op match
       {
-       case "++" => TFun(List(TSizedInt(b1, true), TSizedInt(b2, true)), TSizedInt(TBitWidthAdd(b1, b2), true))
-       case _ => TFun(List(TSizedInt(b1, true), TSizedInt(b2, true)), TSizedInt(b1, true))
+       case "++" => TFun(List(TSizedInt(b1, s), TSizedInt(b2, s)), TSizedInt(TBitWidthAdd(b1, b2), s))
+       case _ => TFun(List(TSizedInt(b1, s), TSizedInt(b2, s)), TSizedInt(b1, s))
       }
     }
 
     private def uOpExpectedType(u: UOp): Type = u match
     {
      case BitUOp(op) => val b1 = generateBitWidthTypeVar() //TODO: Fix this
-      TFun(List(TSizedInt(b1, true)), TSizedInt(b1, true))
+      val s = generateSignTypeVar()
+      TFun(List(TSizedInt(b1, s)), TSizedInt(b1, s))
      case BoolUOp(op) => TFun(List(TBool()), TBool())
      case NumUOp(op) => val b1 = generateBitWidthTypeVar()
-      TFun(List(TSizedInt(b1, true)), TSizedInt(b1, true))
+      val s = generateSignTypeVar()
+      TFun(List(TSizedInt(b1, s)), TSizedInt(b1, s))
 
     }
 
@@ -545,7 +575,7 @@ object TypeInferenceWrapper
 
     private def getMemAccessType(t: TMemType): TFun =
      {
-      TFun(List(TSizedInt(TBitWidthLen(t.addrSize), unsigned = true)), t.elem)
+      TFun(List(TSizedInt(TBitWidthLen(t.addrSize), sign = TUnsigned()/*true*/)), t.elem)
      }
 
    }