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minor fix
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alabarjasteh committed Aug 5, 2021
1 parent b20ffdb commit 3b914d0
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Showing 2 changed files with 3 additions and 5 deletions.
6 changes: 2 additions & 4 deletions main.go
Original file line number Diff line number Diff line change
Expand Up @@ -8,8 +8,6 @@ import (
"github.com/alabarjasteh/mips-simulator/mips"
)

type Instruction int64

func main() {
memFile := flag.String("file", "array-max-min.txt", "initiating memory state")
flag.Parse()
Expand All @@ -18,7 +16,7 @@ func main() {
mem := mips.NewMemory(*memFile)
cpu := mips.NewCPU(mem)

ticker := time.NewTicker(time.Millisecond * 200)
ticker := time.NewTicker(time.Millisecond * 500)
done := make(chan bool)

fetchClockChan := make(chan string) // blocking channels, for synchronization of pipeline stages
Expand All @@ -27,7 +25,7 @@ func main() {
memoryClockChan := make(chan string)
writebackClockChan := make(chan string)

ifDecChan := make(chan mips.IfDec, 1) // non-blocking channels with buffers size = 1. These act as inter-stage's registers.
ifDecChan := make(chan mips.IfDec, 1) // non-blocking channels with buffers size = 1 (async communication). These act as inter-stage's registers.
decExcChan := make(chan mips.DecExc, 1)
exMemChan := make(chan mips.ExMem, 1)
memWBChan := make(chan mips.MemWB, 1)
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2 changes: 1 addition & 1 deletion mips/cpu.go
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ import (
"time"
)

type CPU struct {
type CPU struct { // no mutex is needed, all accesses to share data are sequential.
PC int
Mem Memory
RegFile [32]int32
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