Esp32-C3 - SVD 2024

[kassane]

cc: @MasterQ32

References

• espressif/svd@104da3c
• esp-rs/esp-pacs@55f9f6c

[kassane]

CI error:
https://github.com/ZigEmbeddedGroup/microzig/actions/runs/8086188892/job/22095381000?pr=180#step:7:87

src/blinky.zig:63:14: error: no field named 'FUNC_OUT_SEL_CFG' in struct 'chip.types.peripherals.GPIO'

[ikskuh]

CI error: https://github.com/ZigEmbeddedGroup/microzig/actions/runs/8086188892/job/22095381000?pr=180#step:7:87

src/blinky.zig:63:14: error: no field named 'FUNC_OUT_SEL_CFG' in struct 'chip.types.peripherals.GPIO'

Looks like you should also fix the example then to compile with the new SVD file, seems like they changed the structure of the registers

[kassane]

Making the GPIO device regz auto-generated by build is very complicated. It changes with each version.
It might be useful to run tests between the files generated with a base interface to find out the effects.

It is not possible to do this PR at the moment. I will have to modify the espressif SVD or just add some extra code to microzig and refactor the example that is available.

[ikskuh]

I mean you can just refactor the example, it's still just the hack i did a long time ago