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Cleanup partially
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Grazfather committed Feb 17, 2025
1 parent 67dce73 commit dca8aa6
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Showing 5 changed files with 6 additions and 19 deletions.
2 changes: 0 additions & 2 deletions examples/raspberrypi/rp2xxx/build.zig
Original file line number Diff line number Diff line change
Expand Up @@ -75,14 +75,12 @@ pub fn build(b: *std.Build) void {
//
// The target will convey all necessary information on the chip,
// cpu and potentially the board as well.
const rtt_mod = b.dependency("rtt", .{}).module("rtt");
const firmware = mb.add_firmware(.{
.name = example.name,
.target = example.target,
.optimize = optimize,
.root_source_file = b.path(example.file),
});
firmware.add_app_import("rtt", rtt_mod, .{});

// `install_firmware()` is the MicroZig pendant to `Build.installArtifact()`
// and allows installing the firmware as a typical firmware file.
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4 changes: 0 additions & 4 deletions examples/raspberrypi/rp2xxx/build.zig.zon
Original file line number Diff line number Diff line change
Expand Up @@ -3,10 +3,6 @@
.version = "0.0.0",
.dependencies = .{
.microzig = .{ .path = "../../.." },
.rtt = .{
.url = "git+https://github.com/haydenridd/zig-rtt#595a42f4b80a77ffa87619f2a61ddc1b8ff53df1",
.hash = "12205fd51be74c1f7c77283fb5e7c70fb2f631cfed0aa8d71bd9f65abe4900491099",
},
},
.paths = .{
"LICENSE",
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10 changes: 1 addition & 9 deletions examples/raspberrypi/rp2xxx/src/rp2040_only/spi_host.zig
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,6 @@ const peripherals = microzig.chip.peripherals;

const BUF_LEN = 0x100;
const spi = rp2xxx.spi.instance.SPI0;
// const led = gpio.num(14);

// These will change depending on which GPIO pins you have your SPI device routed to.
const CS_PIN = 5;
Expand All @@ -21,9 +20,6 @@ const MISO_PIN = 4;
// TODO Remove this once working!
// No device implementation yet in Zig, see Rpi Pico SDK for an example: https://github.com/raspberrypi/pico-examples/blob/master/spi/spi_master_slave/spi_slave/spi_slave.c
pub fn main() !void {
// led.set_function(.sio);
// led.set_direction(.out);
// led.put(1);

// Note that CSN pin is manually controlled here rather than by the SPI peripheral.
// If CSN is configured to "SPI" function, it will get toggled after every data packet by the RP2040's
Expand All @@ -49,8 +45,6 @@ pub fn main() !void {
.baud_rate = 500_000,
});
var out_buf_eight: [BUF_LEN]u8 = .{ 'h', 'e', 'l', 'o' } ** (BUF_LEN / 4);
// var out_buf_eight: [BUF_LEN]u8 = .{ 0xAA, 0xBB, 0xCC, 0xDD } ** (BUF_LEN / 4);
// var in_buf_eight: [BUF_LEN]u8 = undefined;
csn.put(0);
spi.write_blocking(u8, out_buf_eight[0..4]);
csn.put(1);
Expand All @@ -74,12 +68,10 @@ pub fn main() !void {
.baud_rate = 500_000,
});
while (true) {
// led.put(1);
csn.put(0);
std.log.info("Sending some data\n", .{});
spi.write_blocking(u8, &out_buf_eight);
csn.put(1);
// led.put(0);
time.sleep_ms(1 * 500);
time.sleep_ms(1 * 1000);
}
}
5 changes: 3 additions & 2 deletions examples/raspberrypi/rp2xxx/src/rp2040_only/spi_slave.zig
Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,9 @@ const uart_tx_pin = gpio.num(0);
// These will change depending on which GPIO pins you have your SPI device routed to.
const CS_PIN = 17;
const SCK_PIN = 18;
// NOTE: rp2040 doesn't label pins for master/slave in/out, rather a pin is always for either
// receiving or sending SPI data, no matter whether the chip is in master or slave mode.
// NOTE: rp2xxx doesn't label pins as MOSI/MISO. Instead a pin is always for
// either receiving or transmitting SPI data, no matter whether the chip is in
// master or slave mode.
const RX_PIN = 16;

pub const microzig_options = .{
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4 changes: 2 additions & 2 deletions port/raspberrypi/rp2xxx/src/hal/spi.zig
Original file line number Diff line number Diff line change
Expand Up @@ -172,11 +172,11 @@ pub const SPI = enum(u1) {
regs.SSPCR1.modify(.{ .SSE = 1 });
}

pub fn is_writable(spi: SPI) bool {
pub inline fn is_writable(spi: SPI) bool {
return spi.get_regs().SSPSR.read().TNF == 1;
}

pub fn is_readable(spi: SPI) bool {
pub inline fn is_readable(spi: SPI) bool {
return spi.get_regs().SSPSR.read().RNE == 1;
}

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