fixing register so there is 32 bits (#349)

ZigEmbeddedGroup · Jan 17, 2025 · d6ba2eb · d6ba2eb
1 parent abc866e
commit d6ba2eb
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/core/src/cpus/cortex_m/m0plus.zig b/core/src/cpus/cortex_m/m0plus.zig
@@ -124,7 +124,7 @@ pub const SystemControlBlock = extern struct {
         ///
         /// The processor also wakes up on execution of an SEV instruction or an external event.
         SEVONPEND: u1,
-        reserved2: u17,
+        reserved2: u27,
     }),
     /// Configuration Control Register.
     CCR: mmio.Mmio(packed struct(u32) {