Updated PR #223 for current HEAD and extended it for other WCH's CH32…

…V series. (#302) * Updated PR #223 for current head. The modifications for tools by @akiroz was imported without modification. SVD files are merged to be tha same name as its datasheet. Merged startup codes. Imported rcc_init_hsi_pll() into HAL module. The empty.zig example was almost replaced. However, blinky.zig is not merged because the example by @akiroz is accessing peripheral registers in main function. * Extended PR #223 to the other CH32V series chips. No description about ABI for CH32V103 and CH32V202 but assumed it is EABI. Names of the vector table (Interrupt names) are fixed to be the same name for that of the datasheet. --------- Co-authored-by: nosuz <[email protected]>
ZigEmbeddedGroup · Dec 3, 2024 · d436cad · d436cad
1 parent dad43d5
commit d436cad
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Showing 15 changed files with 735 additions and 933 deletions.
diff --git a/examples/wch/ch32v/src/empty.zig b/examples/wch/ch32v/src/empty.zig
@@ -1,8 +1,8 @@
 const microzig = @import("microzig");
 
-pub fn main() void {
-    while (true) {
-        asm volatile ("" ::: "memory");
-        // asm volatile ("nop");
-    }
+pub fn main() !void {
+    asm volatile ("nop");
+    // while (true) {
+    //     asm volatile ("" ::: "memory");
+    // }
 }
diff --git a/port/wch/ch32v/README.md b/port/wch/ch32v/README.md
@@ -1,3 +1,5 @@
 # WCH CH32Vx03 Package
 
-SVD is copied from [ch32-rs/ch32-rs](https://github.com/ch32-rs/ch32-rs)
+SVD is derived from [ch32-rs/ch32-rs](https://github.com/ch32-rs/ch32-rs).
+
+However, the names of registers and interrupts are fixed to match the same names in the datasheet.
diff --git a/port/wch/ch32v/build.zig b/port/wch/ch32v/build.zig
@@ -3,6 +3,8 @@ const microzig = @import("microzig/build-internals");
 
 const Self = @This();
 
+const KiB = 1024;
+
 chips: struct {
     ch32v003x4: *const microzig.Target,
     ch32v103x6: *const microzig.Target,
@@ -46,7 +48,7 @@ pub fn init(dep: *std.Build.Dependency) Self {
             std.Target.riscv.Feature.c,
         }),
         .os_tag = .freestanding,
-        .abi = .none,
+        .abi = .eabi,
     };
 
     const qingkev3 = .{
@@ -59,7 +61,7 @@ pub fn init(dep: *std.Build.Dependency) Self {
             std.Target.riscv.Feature.m,
         }),
         .os_tag = .freestanding,
-        .abi = .none,
+        .abi = .eabi,
     };
 
     const qingkev4b = .{
@@ -72,7 +74,7 @@ pub fn init(dep: *std.Build.Dependency) Self {
             std.Target.riscv.Feature.m,
         }),
         .os_tag = .freestanding,
-        .abi = .none,
+        .abi = .eabi,
     };
 
     const chip_ch32v003x4: microzig.Target = .{
@@ -86,8 +88,8 @@ pub fn init(dep: *std.Build.Dependency) Self {
                 .svd = b.path("src/chips/ch32v003.svd"),
             },
             .memory_regions = &.{
-                .{ .offset = 0x08000000, .length = 16 * 1024, .kind = .flash },
-                .{ .offset = 0x20000000, .length = 2 * 1024, .kind = .ram },
+                .{ .offset = 0x08000000, .length = 16 * KiB, .kind = .flash },
+                .{ .offset = 0x20000000, .length = 2 * KiB, .kind = .ram },
             },
         },
         .hal = hal_ch32v003,
@@ -99,11 +101,10 @@ pub fn init(dep: *std.Build.Dependency) Self {
         .chip = .{
             .name = "CH32V103xx", // <name/> from SVD
             .cpu = qingkev3,
-            // .cpu = microzig.cpus.riscv32_imac,
             .cpu_module_file = b.path("src/cpus/qingkev3-rv32imac.zig"),
             .memory_regions = &.{
-                .{ .offset = 0x08000000, .length = 64 * 1024, .kind = .flash },
-                .{ .offset = 0x20000000, .length = 20 * 1024, .kind = .ram },
+                .{ .offset = 0x08000000, .length = 64 * KiB, .kind = .flash },
+                .{ .offset = 0x20000000, .length = 20 * KiB, .kind = .ram },
             },
             .register_definition = .{
                 .svd = b.path("src/chips/ch32v103.svd"),
@@ -118,11 +119,10 @@ pub fn init(dep: *std.Build.Dependency) Self {
         .chip = .{
             .name = "CH32V103xx", // <name/> from SVD
             .cpu = qingkev3,
-            // .cpu = microzig.cpus.riscv32_imac,
             .cpu_module_file = b.path("src/cpus/qingkev3-rv32imac.zig"),
             .memory_regions = &.{
-                .{ .offset = 0x08000000, .length = 32 * 1024, .kind = .flash },
-                .{ .offset = 0x20000000, .length = 10 * 1024, .kind = .ram },
+                .{ .offset = 0x08000000, .length = 32 * KiB, .kind = .flash },
+                .{ .offset = 0x20000000, .length = 10 * KiB, .kind = .ram },
             },
             .register_definition = .{
                 .svd = b.path("src/chips/ch32v103.svd"),
@@ -140,8 +140,8 @@ pub fn init(dep: *std.Build.Dependency) Self {
             .cpu = qingkev4b,
             .cpu_module_file = b.path("src/cpus/qingkev4-rv32imac.zig"),
             .memory_regions = &.{
-                .{ .offset = 0x08000000, .length = 64 * 1024, .kind = .flash },
-                .{ .offset = 0x20000000, .length = 20 * 1024, .kind = .ram },
+                .{ .offset = 0x08000000, .length = 64 * KiB, .kind = .flash },
+                .{ .offset = 0x20000000, .length = 20 * KiB, .kind = .ram },
             },
             .register_definition = .{
                 .svd = b.path("src/chips/ch32v20x.svd"),
@@ -158,8 +158,8 @@ pub fn init(dep: *std.Build.Dependency) Self {
             .cpu = qingkev4b,
             .cpu_module_file = b.path("src/cpus/qingkev4-rv32imac.zig"),
             .memory_regions = &.{
-                .{ .offset = 0x08000000, .length = 32 * 1024, .kind = .flash },
-                .{ .offset = 0x20000000, .length = 10 * 1024, .kind = .ram },
+                .{ .offset = 0x08000000, .length = 32 * KiB, .kind = .flash },
+                .{ .offset = 0x20000000, .length = 10 * KiB, .kind = .ram },
             },
             .register_definition = .{
                 .svd = b.path("src/chips/ch32v20x.svd"),