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fix stm32 generation
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mattnite committed Jan 20, 2025
1 parent 8c22933 commit c3e71e0
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Showing 10 changed files with 136 additions and 131 deletions.
2 changes: 1 addition & 1 deletion build.zig
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@ pub fn build(b: *Build) void {
const generate_linker_script_exe = b.addExecutable(.{
.name = "generate_linker_script",
.root_source_file = b.path("tools/generate_linker_script.zig"),
.target = b.host,
.target = b.graph.host,
.optimize = optimize,
});

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2 changes: 1 addition & 1 deletion port/stmicro/stm32/build.zig
Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,7 @@ pub fn build(b: *std.Build) !void {
const generate_exe = b.addExecutable(.{
.name = "generate",
.root_source_file = b.path("src/generate.zig"),
.target = b.host,
.target = b.graph.host,
.optimize = generate_optimize,
});
generate_exe.root_module.addImport("regz", regz);
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4 changes: 2 additions & 2 deletions port/stmicro/stm32/src/generate.zig
Original file line number Diff line number Diff line change
Expand Up @@ -374,7 +374,7 @@ pub fn main() !void {
const device_id = try db.create_device(.{
.name = chip_file.value.name,
// TODO
.arch = std.meta.stringToEnum(regz.Database.Arch, core_to_cpu.get(core.name).?).?,
.arch = std.meta.stringToEnum(regz.Arch, core_to_cpu.get(core.name).?).?,
});

const device = try db.get_device_by_name(arena.allocator(), chip_file.value.name);
Expand Down Expand Up @@ -540,7 +540,7 @@ fn generate_chips_file(
var flash_bank: ?ChipFile.Memory = null;
for (chip_file.memory) |memory| {
if (memory.kind == .flash) {
var part_iter = std.mem.splitBackwards(u8, memory.name, "_");
var part_iter = std.mem.splitBackwardsScalar(u8, memory.name, '_');

// Ignore the region id.
_ = part_iter.next() orelse return error.InvalidMemoryName;
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121 changes: 1 addition & 120 deletions tools/regz/src/Database.zig
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@ const atdf = @import("atdf.zig");
const gen = @import("gen.zig");
const Patch = @import("patch.zig").Patch;
const SQL_Options = @import("SQL_Options.zig");
const Arch = @import("arch.zig").Arch;

const log = std.log.scoped(.db);

Expand Down Expand Up @@ -486,126 +487,6 @@ fn ID(comptime T: type, comptime table_name: []const u8) type {
};
}

// concrete arch's that we support in codegen, for stuff like interrupt
// table generation
pub const Arch = enum {
unknown,

// arm
arm_v81_mml,
arm_v8_mbl,
arm_v8_mml,
cortex_a15,
cortex_a17,
cortex_a5,
cortex_a53,
cortex_a57,
cortex_a7,
cortex_a72,
cortex_a8,
cortex_a9,
cortex_m0,
cortex_m0plus,
cortex_m1,
cortex_m23,
cortex_m3,
cortex_m33,
cortex_m35p,
cortex_m4,
cortex_m55,
cortex_m7,
sc000, // kindof like an m3
sc300,
// old
arm926ej_s,

// avr
avr8,
avr8l,
avr8x,
avr8xmega,

// mips
mips,

// riscv
qingke_v2,
qingke_v3,
qingke_v4,
hazard3,

pub const BaseType = []const u8;
pub const default = .unknown;

pub fn to_string(arch: Arch) []const u8 {
return inline for (@typeInfo(Arch).Enum.fields) |field| {
if (@field(Arch, field.name) == arch)
break field.name;
} else unreachable;
}

pub fn is_arm(arch: Arch) bool {
return switch (arch) {
.cortex_m0,
.cortex_m0plus,
.cortex_m1,
.sc000, // kindof like an m3
.cortex_m23,
.cortex_m3,
.cortex_m33,
.cortex_m35p,
.cortex_m55,
.sc300,
.cortex_m4,
.cortex_m7,
.arm_v8_mml,
.arm_v8_mbl,
.arm_v81_mml,
.cortex_a5,
.cortex_a7,
.cortex_a8,
.cortex_a9,
.cortex_a15,
.cortex_a17,
.cortex_a53,
.cortex_a57,
.cortex_a72,
.arm926ej_s,
=> true,
else => false,
};
}

pub fn is_avr(arch: Arch) bool {
return switch (arch) {
.avr8,
.avr8l,
.avr8x,
.avr8xmega,
=> true,
else => false,
};
}

pub fn is_mips(arch: Arch) bool {
return switch (arch) {
.mips => true,
else => false,
};
}

pub fn is_riscv(arch: Arch) bool {
return switch (arch) {
.qingke_v2,
.qingke_v3,
.qingke_v4,
.hazard3,
=> true,
else => false,
};
}
};

fn init(db: *Database, allocator: Allocator) !void {
const sql = try sqlite.Db.init(.{
.diags = &db.diags,
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119 changes: 119 additions & 0 deletions tools/regz/src/arch.zig
Original file line number Diff line number Diff line change
@@ -0,0 +1,119 @@
// concrete arch's that we support in codegen, for stuff like interrupt
// table generation
pub const Arch = enum {
unknown,

// arm
arm_v81_mml,
arm_v8_mbl,
arm_v8_mml,
cortex_a15,
cortex_a17,
cortex_a5,
cortex_a53,
cortex_a57,
cortex_a7,
cortex_a72,
cortex_a8,
cortex_a9,
cortex_m0,
cortex_m0plus,
cortex_m1,
cortex_m23,
cortex_m3,
cortex_m33,
cortex_m35p,
cortex_m4,
cortex_m55,
cortex_m7,
sc000, // kindof like an m3
sc300,
// old
arm926ej_s,

// avr
avr8,
avr8l,
avr8x,
avr8xmega,

// mips
mips,

// riscv
qingke_v2,
qingke_v3,
qingke_v4,
hazard3,

pub const BaseType = []const u8;
pub const default = .unknown;

pub fn to_string(arch: Arch) []const u8 {
return inline for (@typeInfo(Arch).Enum.fields) |field| {
if (@field(Arch, field.name) == arch)
break field.name;
} else unreachable;
}

pub fn is_arm(arch: Arch) bool {
return switch (arch) {
.cortex_m0,
.cortex_m0plus,
.cortex_m1,
.sc000, // kindof like an m3
.cortex_m23,
.cortex_m3,
.cortex_m33,
.cortex_m35p,
.cortex_m55,
.sc300,
.cortex_m4,
.cortex_m7,
.arm_v8_mml,
.arm_v8_mbl,
.arm_v81_mml,
.cortex_a5,
.cortex_a7,
.cortex_a8,
.cortex_a9,
.cortex_a15,
.cortex_a17,
.cortex_a53,
.cortex_a57,
.cortex_a72,
.arm926ej_s,
=> true,
else => false,
};
}

pub fn is_avr(arch: Arch) bool {
return switch (arch) {
.avr8,
.avr8l,
.avr8x,
.avr8xmega,
=> true,
else => false,
};
}

pub fn is_mips(arch: Arch) bool {
return switch (arch) {
.mips => true,
else => false,
};
}

pub fn is_riscv(arch: Arch) bool {
return switch (arch) {
.qingke_v2,
.qingke_v3,
.qingke_v4,
.hazard3,
=> true,
else => false,
};
}
};
6 changes: 3 additions & 3 deletions tools/regz/src/arch/arm.zig
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ const assert = std.debug.assert;
const Allocator = std.mem.Allocator;

const Database = @import("../Database.zig");
const Arch = Database.Arch;
const Arch = @import("../arch.zig").Arch;
const DeviceID = Database.DeviceID;

const gen = @import("../gen.zig");
Expand Down Expand Up @@ -53,8 +53,8 @@ const system_interrupts = struct {
pub fn load_system_interrupts(db: *Database, device: *const Database.Device) !void {
assert(device.arch.is_arm());

inline for (@typeInfo(Database.Arch).@"enum".fields) |field| {
if (device.arch == @field(Database.Arch, field.name)) {
inline for (@typeInfo(Arch).@"enum".fields) |field| {
if (device.arch == @field(Arch, field.name)) {
if (@hasDecl(system_interrupts, field.name)) {
for (@field(system_interrupts, field.name)) |interrupt| {
_ = try db.create_interrupt(device.id, .{
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3 changes: 2 additions & 1 deletion tools/regz/src/atdf.zig
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@ const StructID = Database.StructID;
const RegisterID = Database.RegisterID;

const xml = @import("xml.zig");
const Arch = @import("arch.zig").Arch;

const log = std.log.scoped(.atdf);

Expand Down Expand Up @@ -158,7 +159,7 @@ fn load_interrupt_group(ctx: *Context, node: xml.Node, device_id: DeviceID) !voi
}
}

fn arch_from_str(str: []const u8) Database.Arch {
fn arch_from_str(str: []const u8) Arch {
return if (std.mem.eql(u8, "ARM926EJ-S", str))
.arm926ej_s
else if (std.mem.eql(u8, "AVR8", str))
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2 changes: 2 additions & 0 deletions tools/regz/src/module.zig
Original file line number Diff line number Diff line change
@@ -1,2 +1,4 @@
pub const Database = @import("Database.zig");
pub const arm = @import("arch/arm.zig");
pub const Patch = @import("patch.zig").Patch;
pub const Arch = @import("arch.zig").Arch;
3 changes: 2 additions & 1 deletion tools/regz/src/patch.zig
Original file line number Diff line number Diff line change
@@ -1,6 +1,7 @@
const std = @import("std");
const Allocator = std.mem.Allocator;
const Database = @import("Database.zig");
const Arch = @import("arch.zig").Arch;

pub const Type = struct {
pub const EnumField = struct {
Expand All @@ -20,7 +21,7 @@ pub const Type = struct {
pub const Patch = union(enum) {
override_arch: struct {
device_name: []const u8,
arch: Database.Arch,
arch: Arch,
},
add_enum: struct {
parent: []const u8,
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5 changes: 3 additions & 2 deletions tools/regz/src/svd.zig
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@ const Allocator = std.mem.Allocator;
const assert = std.debug.assert;

const xml = @import("xml.zig");
const Arch = @import("arch.zig").Arch;

const Database = @import("Database.zig");
const Access = Database.Access;
Expand Down Expand Up @@ -61,7 +62,7 @@ pub fn load_into_db(db: *Database, doc: xml.Doc) !void {

const name = root.get_value("name") orelse return error.MissingDeviceName;
const description = root.get_value("description");
const arch: Database.Arch = blk: {
const arch: Arch = blk: {
var cpu_it = root.iterate(&.{}, &.{"cpu"});
if (cpu_it.next()) |cpu| {
if (cpu.get_value("name")) |cpu_name| {
Expand Down Expand Up @@ -203,7 +204,7 @@ fn derive_peripherals(ctx: *Context, device_id: DeviceID) !void {
}
}

fn arch_from_str(str: []const u8) Database.Arch {
fn arch_from_str(str: []const u8) Arch {
return if (std.mem.eql(u8, "CM0", str))
.cortex_m0
else if (std.mem.eql(u8, "CM0PLUS", str))
Expand Down

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