try building regz in release safe mode

ZigEmbeddedGroup · Dec 23, 2024 · 11a1244 · 11a1244
1 parent cc31fd5
commit 11a1244
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/build.zig b/build.zig
@@ -328,7 +328,7 @@ pub fn MicroBuild(port_select: PortSelect) type {
             cpu_mod.addImport("microzig", core_mod);
             core_mod.addImport("cpu", cpu_mod);
 
-            const regz_exe = b.dependency("tools/regz", .{}).artifact("regz");
+            const regz_exe = b.dependency("tools/regz", .{ .optimize = .ReleaseSafe }).artifact("regz");
             const chip_source = switch (target.chip.register_definition) {
                 .atdf, .svd => |file| blk: {
                     const regz_run = b.addRunArtifact(regz_exe);